From patchwork Sat Jan 12 09:47:24 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ramon Fried X-Patchwork-Id: 1023858 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="XXiytOBk"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 43cFKM3JQRz9s55 for ; Sat, 12 Jan 2019 20:48:07 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 23081C2226D; Sat, 12 Jan 2019 09:47:58 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=FREEMAIL_FROM, RCVD_IN_MSPIKE_H2, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id CF374C22238; Sat, 12 Jan 2019 09:47:39 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 07156C21F07; Sat, 12 Jan 2019 09:47:38 +0000 (UTC) Received: from mail-wr1-f66.google.com (mail-wr1-f66.google.com [209.85.221.66]) by lists.denx.de (Postfix) with ESMTPS id A98AEC21D8A for ; Sat, 12 Jan 2019 09:47:38 +0000 (UTC) Received: by mail-wr1-f66.google.com with SMTP id s12so17699756wrt.4 for ; Sat, 12 Jan 2019 01:47:38 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=Y0RgaS6Pw9+IElehXgqEVoKg6u/QsEcKzYBtRggbNAo=; b=XXiytOBkif0R7bNR/gDce/509iQ20obO3UJPjNDliIxzmmo2pnqo+TZ38KsmmXrkA4 DNnFkfHr2gaGl3GN3YW8CcA5fPfj4MofNoe+VPxNov/Q6FI/4KICpwE40w58grP3W1nb vH5hvpvuYITWNoLA9URFHJV3kridcme8pEGphIMC7RAgeoCxp9zPatqXWvZ8EEpUKRn9 o5V185ttHQoaCbNUwoWLDR1/NXGUuOg6s8J1bwUUzACgNzgJMVVWrfFC18yGPMjYbuoz 4W1ifKrFsEbdYd+8GCCqe5YAzc3uhQrEPowX007QCeksDQmh0HbiFQ+ZU2OYEmpzu7Fu X3vw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=Y0RgaS6Pw9+IElehXgqEVoKg6u/QsEcKzYBtRggbNAo=; b=rZbwovqzAtucYdN1vJ7+x3yiqff0buZUWFMwLlpS6t7lgS1EHGUy8MNW0GoCsfUhE2 9DRYm7kHvepRsUPnyDh+XNFWABLZ2X4ACUfvuLQ+BHOfuczdaf2LRw7+3rbgz2EhEwiL /If3lRbTgZg0USZOglNdqFUdB8Sq4QxEK3VIdD0cbu/ryAH/2adeUkVy2+OawS978v1H YJb4uIcSPhy6EBULIbrDEG3pgMprA4pjE5VBcqFbfUUYjyD1WLwIsPfYe3maORFMx65U pVjw7DGO6gbGQc2uCZqaBxDHpmRZLhu9GzXeZxNHVDc2njs5xTjogljgEhR64rw+pi7N gdkg== X-Gm-Message-State: AJcUukcPNiGi4dusOwVnxp7moipOdvEKykuXniJQMLuZ9sUVp+ACZURM Nq7P3+I8WVbWV8yVRAekaoVKMlARRaA= X-Google-Smtp-Source: ALg8bN4aeDH25NQwz4m+r+hkvbjgBDNjJL2FtN/HWeYGVYu/xNbIkIyhqF1FVUJXLO+3r6JcFmKU7A== X-Received: by 2002:adf:f401:: with SMTP id g1mr17341103wro.103.1547286457969; Sat, 12 Jan 2019 01:47:37 -0800 (PST) Received: from localhost.localdomain ([141.226.31.91]) by smtp.gmail.com with ESMTPSA id 67sm102270684wra.37.2019.01.12.01.47.36 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sat, 12 Jan 2019 01:47:37 -0800 (PST) From: Ramon Fried To: u-boot@lists.denx.de Date: Sat, 12 Jan 2019 11:47:24 +0200 Message-Id: <20190112094728.14189-2-ramon.fried@gmail.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20190112094728.14189-1-ramon.fried@gmail.com> References: <20190112094728.14189-1-ramon.fried@gmail.com> MIME-Version: 1.0 Cc: Tom Rini Subject: [U-Boot] [PATCH v1 1/5] arm: mach-snapdragon: db820c: Actually init PLL for serial X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" The PLL for the UART was not set, and relied on previous initializtion made by LK. add the appropriate initialization. Signed-off-by: Ramon Fried --- arch/arm/mach-snapdragon/clock-apq8096.c | 34 +++++++++++++++++++ .../include/mach/sysmap-apq8096.h | 9 +++++ 2 files changed, 43 insertions(+) diff --git a/arch/arm/mach-snapdragon/clock-apq8096.c b/arch/arm/mach-snapdragon/clock-apq8096.c index 628c38785b..e5011be8f2 100644 --- a/arch/arm/mach-snapdragon/clock-apq8096.c +++ b/arch/arm/mach-snapdragon/clock-apq8096.c @@ -34,6 +34,12 @@ static const struct pll_vote_clk gpll0_vote_clk = { .vote_bit = APCS_GPLL_ENA_VOTE_GPLL0, }; +static struct vote_clk gcc_blsp2_ahb_clk = { + .cbcr_reg = BLSP2_AHB_CBCR, + .ena_vote = APCS_CLOCK_BRANCH_ENA_VOTE, + .vote_bit = BIT(15), +}; + static int clk_init_sdc(struct msm_clk_priv *priv, uint rate) { int div = 3; @@ -47,6 +53,32 @@ static int clk_init_sdc(struct msm_clk_priv *priv, uint rate) return rate; } +static const struct bcr_regs uart2_regs = { + .cfg_rcgr = BLSP2_UART2_APPS_CFG_RCGR, + .cmd_rcgr = BLSP2_UART2_APPS_CMD_RCGR, + .M = BLSP2_UART2_APPS_M, + .N = BLSP2_UART2_APPS_N, + .D = BLSP2_UART2_APPS_D, +}; + +static int clk_init_uart(struct msm_clk_priv *priv) +{ + /* Enable AHB clock */ + clk_enable_vote_clk(priv->base, &gcc_blsp2_ahb_clk); + + /* 7372800 uart block clock @ GPLL0 */ + clk_rcg_set_rate_mnd(priv->base, &uart2_regs, 1, 192, 15625, + CFG_CLK_SRC_GPLL0); + + /* Vote for gpll0 clock */ + clk_enable_gpll0(priv->base, &gpll0_vote_clk); + + /* Enable core clk */ + clk_enable_cbc(priv->base + BLSP2_UART2_APPS_CBCR); + + return 0; +} + ulong msm_set_rate(struct clk *clk, ulong rate) { struct msm_clk_priv *priv = dev_get_priv(clk->dev); @@ -55,6 +87,8 @@ ulong msm_set_rate(struct clk *clk, ulong rate) case 0: /* SDC1 */ return clk_init_sdc(priv, rate); break; + case 4: /*UART2*/ + return clk_init_uart(priv); default: return 0; } diff --git a/arch/arm/mach-snapdragon/include/mach/sysmap-apq8096.h b/arch/arm/mach-snapdragon/include/mach/sysmap-apq8096.h index 14febb6487..36a902bd92 100644 --- a/arch/arm/mach-snapdragon/include/mach/sysmap-apq8096.h +++ b/arch/arm/mach-snapdragon/include/mach/sysmap-apq8096.h @@ -15,6 +15,7 @@ /* Clocks: (from CLK_CTL_BASE) */ #define GPLL0_STATUS (0x0000) #define APCS_GPLL_ENA_VOTE (0x52000) +#define APCS_CLOCK_BRANCH_ENA_VOTE (0x52004) #define SDCC2_BCR (0x14000) /* block reset */ #define SDCC2_APPS_CBCR (0x14004) /* branch control */ @@ -25,4 +26,12 @@ #define SDCC2_N (0x1401C) #define SDCC2_D (0x14020) +#define BLSP2_AHB_CBCR (0x25004) +#define BLSP2_UART2_APPS_CBCR (0x29004) +#define BLSP2_UART2_APPS_CMD_RCGR (0x2900C) +#define BLSP2_UART2_APPS_CFG_RCGR (0x29010) +#define BLSP2_UART2_APPS_M (0x29014) +#define BLSP2_UART2_APPS_N (0x29018) +#define BLSP2_UART2_APPS_D (0x2901C) + #endif