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[U-Boot,v3,2/2] riscv: qemu: Imply SIFIVE_SERIAL for emulation

Message ID 20181215060516.61933-3-anup@brainfault.org
State Accepted
Delegated to: Andes
Headers show
Series SiFive UART support | expand

Commit Message

Anup Patel Dec. 15, 2018, 6:05 a.m. UTC 
This patch enables SiFive UART driver for QEMU RISC-V emulation
by implying SIFIVE_SERIAL on BOARD_SPECIFIC_OPTIONS.

Signed-off-by: Anup Patel <anup@brainfault.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
---
 board/emulation/qemu-riscv/Kconfig | 1 +
 1 file changed, 1 insertion(+)
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Patch

diff --git a/board/emulation/qemu-riscv/Kconfig b/board/emulation/qemu-riscv/Kconfig
index ed005e5678..0d865acf10 100644
--- a/board/emulation/qemu-riscv/Kconfig
+++ b/board/emulation/qemu-riscv/Kconfig
@@ -33,5 +33,6 @@  config BOARD_SPECIFIC_OPTIONS # dummy
 	imply CMD_FAT
 	imply BOARD_LATE_INIT
 	imply OF_BOARD_SETUP
+	imply SIFIVE_SERIAL
 
 endif