From patchwork Mon Dec 3 05:27:42 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anup Patel X-Patchwork-Id: 1006661 X-Patchwork-Delegate: uboot@andestech.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=brainfault.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=brainfault-org.20150623.gappssmtp.com header.i=@brainfault-org.20150623.gappssmtp.com header.b="sf1sMT4l"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 437YT01CJCz9sBh for ; Mon, 3 Dec 2018 16:29:08 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id D3990C226D6; Mon, 3 Dec 2018 05:28:39 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=-0.0 required=5.0 tests=RCVD_IN_DNSWL_BLOCKED, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 88312C22680; Mon, 3 Dec 2018 05:28:20 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id C4BFBC22074; Mon, 3 Dec 2018 05:28:16 +0000 (UTC) Received: from mail-pg1-f196.google.com (mail-pg1-f196.google.com [209.85.215.196]) by lists.denx.de (Postfix) with ESMTPS id C8942C220BC for ; Mon, 3 Dec 2018 05:28:11 +0000 (UTC) Received: by mail-pg1-f196.google.com with SMTP id 17so5197450pgg.1 for ; Sun, 02 Dec 2018 21:28:11 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=brainfault-org.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=kE5TOK27CoYULOVJYCIFjTFsjogrFvdIAWPXy8fp0sA=; b=sf1sMT4lnIZntlUpsMvw9mhcqWP+yYpxU79ftEvmk8JPvdx9J+h2sIRXaQFPLXgKnl XNKYQ754T2yMR64i2iv1abKgkzcFpsOi1A/VMbq72M/jdTuYyFbfTZwoBHabMbY57yh2 zY0OqC1AV1g+R3scJ5xY7mw7jNAbsb+XVvtmu8/8RxjWG4V7dddcHKyReXNqDAWXJISe EFnvnzZ4L1DgPLEEeZXW/Q8/kiqoFlRJRTLk6zgCvqZh31iY7USpsbWjfIUzX1xRqNaE kFsKzbBXTXqgr06wXG3ve+EiZ0QCJjkGbWzcJNfUeGl1zRBueooF9D6geqlYGOkLT4+x wqpA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=kE5TOK27CoYULOVJYCIFjTFsjogrFvdIAWPXy8fp0sA=; b=klh6Qojoot552JXzdUGMFZ6rtWPHe+vMpXro2L3aQm5m//04OJ3aXE3XjVxz+WKeaJ uPvqo078N7BLgdynaFslGAXJHzPi22IXTiI0YWvTJvU0+1ZtBsU83ZaNHzSxUs48ph7T St6Jl4KHwMXWGZrD0G4OQZhHptoy3oDN6FifGq5t9NHTgpCr8JelAjCnPns/+OgMpsPZ V3J0iH/xxBdD00/hG/3xItiaiXmGzlM0htD5nL0vMMjxhCcb7rdmyBCK+fAZMIZHpYrT KXCuN8kpkG6EbS8UtoIKdmAGyuU9dNf0lGjGuMudvo4OZC39T88RjfXTVP4XIABdQZqz KK3w== X-Gm-Message-State: AA+aEWZhUBLdEWNYUwYgPTE6+rjhNebR/K38UyuXJ6q6tlO/rl9Pv+ju V2nRuQVkWZFcHd805MJYgL31Bw== X-Google-Smtp-Source: AFSGD/XhqeLjqyDCVWAxEhq9hbSDpDWkOnna28llxSAoMZJ5TXF7uXa3RKOvkX6hC8QKCrPqCSA8Kw== X-Received: by 2002:a62:3c1:: with SMTP id 184mr2508732pfd.56.1543814890245; Sun, 02 Dec 2018 21:28:10 -0800 (PST) Received: from anup-ubuntu64.qualcomm.com ([106.51.23.39]) by smtp.googlemail.com with ESMTPSA id n22sm28711233pfh.166.2018.12.02.21.28.07 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Sun, 02 Dec 2018 21:28:09 -0800 (PST) From: Anup Patel To: Rick Chen , Bin Meng , Lukas Auer Date: Mon, 3 Dec 2018 10:57:42 +0530 Message-Id: <20181203052743.29036-4-anup@brainfault.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181203052743.29036-1-anup@brainfault.org> References: <20181203052743.29036-1-anup@brainfault.org> Cc: U-Boot Mailing List , Palmer Dabbelt , Alexander Graf , Christoph Hellwig , Atish Patra Subject: [U-Boot] [PATCH v7 3/4] riscv: Add S-mode defconfigs for QEMU virt machine X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" This patch adds S-mode defconfigs for QEMU virt machine so that we can run u-boot in S-mode on QEMU using M-mode runtime firmware (BBL or equivalent). Signed-off-by: Anup Patel Reviewed-by: Bin Meng Tested-by: Bin Meng Reviewed-by: Lukas Auer --- board/emulation/qemu-riscv/MAINTAINERS | 2 ++ configs/qemu-riscv32_smode_defconfig | 10 ++++++++++ configs/qemu-riscv64_smode_defconfig | 11 +++++++++++ 3 files changed, 23 insertions(+) create mode 100644 configs/qemu-riscv32_smode_defconfig create mode 100644 configs/qemu-riscv64_smode_defconfig diff --git a/board/emulation/qemu-riscv/MAINTAINERS b/board/emulation/qemu-riscv/MAINTAINERS index 3c6eb4f844..c701c83d77 100644 --- a/board/emulation/qemu-riscv/MAINTAINERS +++ b/board/emulation/qemu-riscv/MAINTAINERS @@ -4,4 +4,6 @@ S: Maintained F: board/emulation/qemu-riscv/ F: include/configs/qemu-riscv.h F: configs/qemu-riscv32_defconfig +F: configs/qemu-riscv32_smode_defconfig F: configs/qemu-riscv64_defconfig +F: configs/qemu-riscv64_smode_defconfig diff --git a/configs/qemu-riscv32_smode_defconfig b/configs/qemu-riscv32_smode_defconfig new file mode 100644 index 0000000000..0a84ec1874 --- /dev/null +++ b/configs/qemu-riscv32_smode_defconfig @@ -0,0 +1,10 @@ +CONFIG_RISCV=y +CONFIG_TARGET_QEMU_VIRT=y +CONFIG_RISCV_SMODE=y +CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=1 +CONFIG_FIT=y +CONFIG_DISPLAY_CPUINFO=y +CONFIG_DISPLAY_BOARDINFO=y +# CONFIG_CMD_MII is not set +CONFIG_OF_PRIOR_STAGE=y diff --git a/configs/qemu-riscv64_smode_defconfig b/configs/qemu-riscv64_smode_defconfig new file mode 100644 index 0000000000..b012443370 --- /dev/null +++ b/configs/qemu-riscv64_smode_defconfig @@ -0,0 +1,11 @@ +CONFIG_RISCV=y +CONFIG_TARGET_QEMU_VIRT=y +CONFIG_ARCH_RV64I=y +CONFIG_RISCV_SMODE=y +CONFIG_DISTRO_DEFAULTS=y +CONFIG_NR_DRAM_BANKS=1 +CONFIG_FIT=y +CONFIG_DISPLAY_CPUINFO=y +CONFIG_DISPLAY_BOARDINFO=y +# CONFIG_CMD_MII is not set +CONFIG_OF_PRIOR_STAGE=y