Message ID | 20181130175502.7613-2-noltari@gmail.com |
---|---|
State | Superseded, archived |
Headers | show |
Series | serial: bcm6345: switch to raw I/O functions | expand |
Am 30.11.18 um 18:55 schrieb Álvaro Fernández Rojas: > Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> > --- > drivers/serial/serial_bcm6345.c | 100 ++++++++++++++++++++-------------------- > 1 file changed, 50 insertions(+), 50 deletions(-) > > diff --git a/drivers/serial/serial_bcm6345.c b/drivers/serial/serial_bcm6345.c > index a0e709a11e..2866b88c26 100644 > --- a/drivers/serial/serial_bcm6345.c > +++ b/drivers/serial/serial_bcm6345.c > @@ -89,26 +89,26 @@ struct bcm6345_serial_priv { > /* enable rx & tx operation on uart */ > static void bcm6345_serial_enable(void __iomem *base) > { > - setbits_be32(base + UART_CTL_REG, UART_CTL_BRGEN_MASK | > - UART_CTL_TXEN_MASK | UART_CTL_RXEN_MASK); > + setbits_32(base + UART_CTL_REG, UART_CTL_BRGEN_MASK | > + UART_CTL_TXEN_MASK | UART_CTL_RXEN_MASK); > } > > /* disable rx & tx operation on uart */ > static void bcm6345_serial_disable(void __iomem *base) > { > - clrbits_be32(base + UART_CTL_REG, UART_CTL_BRGEN_MASK | > - UART_CTL_TXEN_MASK | UART_CTL_RXEN_MASK); > + clrbits_32(base + UART_CTL_REG, UART_CTL_BRGEN_MASK | > + UART_CTL_TXEN_MASK | UART_CTL_RXEN_MASK); > } > > /* clear all unread data in rx fifo and unsent data in tx fifo */ > static void bcm6345_serial_flush(void __iomem *base) > { > /* empty rx and tx fifo */ > - setbits_be32(base + UART_CTL_REG, UART_CTL_RSTRXFIFO_MASK | > - UART_CTL_RSTTXFIFO_MASK); > + setbits_32(base + UART_CTL_REG, UART_CTL_RSTRXFIFO_MASK | > + UART_CTL_RSTTXFIFO_MASK); > > /* read any pending char to make sure all irq status are cleared */ > - readl_be(base + UART_FIFO_REG); > + __raw_readl(base + UART_FIFO_REG); if you always use native endianess on ARM and MIPS, you could use readl(). On MIPS this will never swap except you enable CONFIG_SWAP_IO_SPACE. > } > > static int bcm6345_serial_init(void __iomem *base, ulong clk, u32 baudrate) > @@ -120,40 +120,40 @@ static int bcm6345_serial_init(void __iomem *base, ulong clk, u32 baudrate) > bcm6345_serial_flush(base); > > /* set uart control config */ > - clrsetbits_be32(base + UART_CTL_REG, > - /* clear rx timeout */ > - UART_CTL_RXTIMEOUT_MASK | > - /* clear stop bits */ > - UART_CTL_STOPBITS_MASK | > - /* clear bits per symbol */ > - UART_CTL_BITSPERSYM_MASK | > - /* clear xmit break */ > - UART_CTL_XMITBRK_MASK | > - /* clear reserved bit */ > - UART_CTL_RSVD_MASK | > - /* disable parity */ > - UART_CTL_RXPAREN_MASK | > - UART_CTL_TXPAREN_MASK | > - /* disable loopback */ > - UART_CTL_LOOPBACK_MASK, > - /* set timeout to 5 */ > - UART_CTL_RXTIMEOUT_5 | > - /* set 8 bits/symbol */ > - UART_CTL_BITSPERSYM_8 | > - /* set 1 stop bit */ > - UART_CTL_STOPBITS_1 | > - /* set parity to even */ > - UART_CTL_RXPAREVEN_MASK | > - UART_CTL_TXPAREVEN_MASK); > + clrsetbits_32(base + UART_CTL_REG, > + /* clear rx timeout */ > + UART_CTL_RXTIMEOUT_MASK | > + /* clear stop bits */ > + UART_CTL_STOPBITS_MASK | > + /* clear bits per symbol */ > + UART_CTL_BITSPERSYM_MASK | > + /* clear xmit break */ > + UART_CTL_XMITBRK_MASK | > + /* clear reserved bit */ > + UART_CTL_RSVD_MASK | > + /* disable parity */ > + UART_CTL_RXPAREN_MASK | > + UART_CTL_TXPAREN_MASK | > + /* disable loopback */ > + UART_CTL_LOOPBACK_MASK, > + /* set timeout to 5 */ > + UART_CTL_RXTIMEOUT_5 | > + /* set 8 bits/symbol */ > + UART_CTL_BITSPERSYM_8 | > + /* set 1 stop bit */ > + UART_CTL_STOPBITS_1 | > + /* set parity to even */ > + UART_CTL_RXPAREVEN_MASK | > + UART_CTL_TXPAREVEN_MASK); > > /* set uart fifo config */ > - clrsetbits_be32(base + UART_FIFO_CFG_REG, > - /* clear fifo config */ > - UART_FIFO_CFG_RX_MASK | > - UART_FIFO_CFG_TX_MASK, > - /* set fifo config to 4 */ > - UART_FIFO_CFG_RX_4 | > - UART_FIFO_CFG_TX_4); > + clrsetbits_32(base + UART_FIFO_CFG_REG, > + /* clear fifo config */ > + UART_FIFO_CFG_RX_MASK | > + UART_FIFO_CFG_TX_MASK, > + /* set fifo config to 4 */ > + UART_FIFO_CFG_RX_4 | > + UART_FIFO_CFG_TX_4); > > /* set baud rate */ > val = ((clk / baudrate) >> 4); > @@ -161,10 +161,10 @@ static int bcm6345_serial_init(void __iomem *base, ulong clk, u32 baudrate) > val = (val >> 1); > else > val = (val >> 1) - 1; > - writel_be(val, base + UART_BAUD_REG); > + __raw_writel(val, base + UART_BAUD_REG); > > /* clear interrupts */ > - writel_be(0, base + UART_IR_REG); > + __raw_writel(0, base + UART_IR_REG); > > /* enable uart */ > bcm6345_serial_enable(base); > @@ -175,7 +175,7 @@ static int bcm6345_serial_init(void __iomem *base, ulong clk, u32 baudrate) > static int bcm6345_serial_pending(struct udevice *dev, bool input) > { > struct bcm6345_serial_priv *priv = dev_get_priv(dev); > - u32 val = readl_be(priv->base + UART_IR_REG); > + u32 val = __raw_readl(priv->base + UART_IR_REG); > > if (input) > return !!(val & UART_IR_STAT(UART_IR_RXNOTEMPTY)); > @@ -195,11 +195,11 @@ static int bcm6345_serial_putc(struct udevice *dev, const char ch) > struct bcm6345_serial_priv *priv = dev_get_priv(dev); > u32 val; > > - val = readl_be(priv->base + UART_IR_REG); > + val = __raw_readl(priv->base + UART_IR_REG); > if (!(val & UART_IR_STAT(UART_IR_TXEMPTY))) > return -EAGAIN; > > - writel_be(ch, priv->base + UART_FIFO_REG); > + __raw_writel(ch, priv->base + UART_FIFO_REG); > > return 0; > } > @@ -209,14 +209,13 @@ static int bcm6345_serial_getc(struct udevice *dev) > struct bcm6345_serial_priv *priv = dev_get_priv(dev); > u32 val; > > - val = readl_be(priv->base + UART_IR_REG); > + val = __raw_readl(priv->base + UART_IR_REG); > if (val & UART_IR_STAT(UART_IR_RXOVER)) > - setbits_be32(priv->base + UART_CTL_REG, > - UART_CTL_RSTRXFIFO_MASK); > + setbits_32(priv->base + UART_CTL_REG, UART_CTL_RSTRXFIFO_MASK); > if (!(val & UART_IR_STAT(UART_IR_RXNOTEMPTY))) > return -EAGAIN; > > - val = readl_be(priv->base + UART_FIFO_REG); > + val = __raw_readl(priv->base + UART_FIFO_REG); > if (val & UART_FIFO_ANYERR_MASK) > return -EAGAIN; > > @@ -264,6 +263,7 @@ U_BOOT_DRIVER(bcm6345_serial) = { > .probe = bcm6345_serial_probe, > .priv_auto_alloc_size = sizeof(struct bcm6345_serial_priv), > .ops = &bcm6345_serial_ops, > + .flags = DM_FLAG_PRE_RELOC, this was recently removed from all drivers, so it shouldn't be added again > }; > > #ifdef CONFIG_DEBUG_UART_BCM6345 > @@ -277,7 +277,7 @@ static inline void _debug_uart_init(void) > static inline void wait_xfered(void __iomem *base) > { > do { > - u32 val = readl_be(base + UART_IR_REG); > + u32 val = __raw_readl(base + UART_IR_REG); > if (val & UART_IR_STAT(UART_IR_TXEMPTY)) > break; > } while (1); > @@ -288,7 +288,7 @@ static inline void _debug_uart_putc(int ch) > void __iomem *base = (void __iomem *)CONFIG_DEBUG_UART_BASE; > > wait_xfered(base); > - writel_be(ch, base + UART_FIFO_REG); > + __raw_writel(ch, base + UART_FIFO_REG); > wait_xfered(base); > } > >
diff --git a/drivers/serial/serial_bcm6345.c b/drivers/serial/serial_bcm6345.c index a0e709a11e..2866b88c26 100644 --- a/drivers/serial/serial_bcm6345.c +++ b/drivers/serial/serial_bcm6345.c @@ -89,26 +89,26 @@ struct bcm6345_serial_priv { /* enable rx & tx operation on uart */ static void bcm6345_serial_enable(void __iomem *base) { - setbits_be32(base + UART_CTL_REG, UART_CTL_BRGEN_MASK | - UART_CTL_TXEN_MASK | UART_CTL_RXEN_MASK); + setbits_32(base + UART_CTL_REG, UART_CTL_BRGEN_MASK | + UART_CTL_TXEN_MASK | UART_CTL_RXEN_MASK); } /* disable rx & tx operation on uart */ static void bcm6345_serial_disable(void __iomem *base) { - clrbits_be32(base + UART_CTL_REG, UART_CTL_BRGEN_MASK | - UART_CTL_TXEN_MASK | UART_CTL_RXEN_MASK); + clrbits_32(base + UART_CTL_REG, UART_CTL_BRGEN_MASK | + UART_CTL_TXEN_MASK | UART_CTL_RXEN_MASK); } /* clear all unread data in rx fifo and unsent data in tx fifo */ static void bcm6345_serial_flush(void __iomem *base) { /* empty rx and tx fifo */ - setbits_be32(base + UART_CTL_REG, UART_CTL_RSTRXFIFO_MASK | - UART_CTL_RSTTXFIFO_MASK); + setbits_32(base + UART_CTL_REG, UART_CTL_RSTRXFIFO_MASK | + UART_CTL_RSTTXFIFO_MASK); /* read any pending char to make sure all irq status are cleared */ - readl_be(base + UART_FIFO_REG); + __raw_readl(base + UART_FIFO_REG); } static int bcm6345_serial_init(void __iomem *base, ulong clk, u32 baudrate) @@ -120,40 +120,40 @@ static int bcm6345_serial_init(void __iomem *base, ulong clk, u32 baudrate) bcm6345_serial_flush(base); /* set uart control config */ - clrsetbits_be32(base + UART_CTL_REG, - /* clear rx timeout */ - UART_CTL_RXTIMEOUT_MASK | - /* clear stop bits */ - UART_CTL_STOPBITS_MASK | - /* clear bits per symbol */ - UART_CTL_BITSPERSYM_MASK | - /* clear xmit break */ - UART_CTL_XMITBRK_MASK | - /* clear reserved bit */ - UART_CTL_RSVD_MASK | - /* disable parity */ - UART_CTL_RXPAREN_MASK | - UART_CTL_TXPAREN_MASK | - /* disable loopback */ - UART_CTL_LOOPBACK_MASK, - /* set timeout to 5 */ - UART_CTL_RXTIMEOUT_5 | - /* set 8 bits/symbol */ - UART_CTL_BITSPERSYM_8 | - /* set 1 stop bit */ - UART_CTL_STOPBITS_1 | - /* set parity to even */ - UART_CTL_RXPAREVEN_MASK | - UART_CTL_TXPAREVEN_MASK); + clrsetbits_32(base + UART_CTL_REG, + /* clear rx timeout */ + UART_CTL_RXTIMEOUT_MASK | + /* clear stop bits */ + UART_CTL_STOPBITS_MASK | + /* clear bits per symbol */ + UART_CTL_BITSPERSYM_MASK | + /* clear xmit break */ + UART_CTL_XMITBRK_MASK | + /* clear reserved bit */ + UART_CTL_RSVD_MASK | + /* disable parity */ + UART_CTL_RXPAREN_MASK | + UART_CTL_TXPAREN_MASK | + /* disable loopback */ + UART_CTL_LOOPBACK_MASK, + /* set timeout to 5 */ + UART_CTL_RXTIMEOUT_5 | + /* set 8 bits/symbol */ + UART_CTL_BITSPERSYM_8 | + /* set 1 stop bit */ + UART_CTL_STOPBITS_1 | + /* set parity to even */ + UART_CTL_RXPAREVEN_MASK | + UART_CTL_TXPAREVEN_MASK); /* set uart fifo config */ - clrsetbits_be32(base + UART_FIFO_CFG_REG, - /* clear fifo config */ - UART_FIFO_CFG_RX_MASK | - UART_FIFO_CFG_TX_MASK, - /* set fifo config to 4 */ - UART_FIFO_CFG_RX_4 | - UART_FIFO_CFG_TX_4); + clrsetbits_32(base + UART_FIFO_CFG_REG, + /* clear fifo config */ + UART_FIFO_CFG_RX_MASK | + UART_FIFO_CFG_TX_MASK, + /* set fifo config to 4 */ + UART_FIFO_CFG_RX_4 | + UART_FIFO_CFG_TX_4); /* set baud rate */ val = ((clk / baudrate) >> 4); @@ -161,10 +161,10 @@ static int bcm6345_serial_init(void __iomem *base, ulong clk, u32 baudrate) val = (val >> 1); else val = (val >> 1) - 1; - writel_be(val, base + UART_BAUD_REG); + __raw_writel(val, base + UART_BAUD_REG); /* clear interrupts */ - writel_be(0, base + UART_IR_REG); + __raw_writel(0, base + UART_IR_REG); /* enable uart */ bcm6345_serial_enable(base); @@ -175,7 +175,7 @@ static int bcm6345_serial_init(void __iomem *base, ulong clk, u32 baudrate) static int bcm6345_serial_pending(struct udevice *dev, bool input) { struct bcm6345_serial_priv *priv = dev_get_priv(dev); - u32 val = readl_be(priv->base + UART_IR_REG); + u32 val = __raw_readl(priv->base + UART_IR_REG); if (input) return !!(val & UART_IR_STAT(UART_IR_RXNOTEMPTY)); @@ -195,11 +195,11 @@ static int bcm6345_serial_putc(struct udevice *dev, const char ch) struct bcm6345_serial_priv *priv = dev_get_priv(dev); u32 val; - val = readl_be(priv->base + UART_IR_REG); + val = __raw_readl(priv->base + UART_IR_REG); if (!(val & UART_IR_STAT(UART_IR_TXEMPTY))) return -EAGAIN; - writel_be(ch, priv->base + UART_FIFO_REG); + __raw_writel(ch, priv->base + UART_FIFO_REG); return 0; } @@ -209,14 +209,13 @@ static int bcm6345_serial_getc(struct udevice *dev) struct bcm6345_serial_priv *priv = dev_get_priv(dev); u32 val; - val = readl_be(priv->base + UART_IR_REG); + val = __raw_readl(priv->base + UART_IR_REG); if (val & UART_IR_STAT(UART_IR_RXOVER)) - setbits_be32(priv->base + UART_CTL_REG, - UART_CTL_RSTRXFIFO_MASK); + setbits_32(priv->base + UART_CTL_REG, UART_CTL_RSTRXFIFO_MASK); if (!(val & UART_IR_STAT(UART_IR_RXNOTEMPTY))) return -EAGAIN; - val = readl_be(priv->base + UART_FIFO_REG); + val = __raw_readl(priv->base + UART_FIFO_REG); if (val & UART_FIFO_ANYERR_MASK) return -EAGAIN; @@ -264,6 +263,7 @@ U_BOOT_DRIVER(bcm6345_serial) = { .probe = bcm6345_serial_probe, .priv_auto_alloc_size = sizeof(struct bcm6345_serial_priv), .ops = &bcm6345_serial_ops, + .flags = DM_FLAG_PRE_RELOC, }; #ifdef CONFIG_DEBUG_UART_BCM6345 @@ -277,7 +277,7 @@ static inline void _debug_uart_init(void) static inline void wait_xfered(void __iomem *base) { do { - u32 val = readl_be(base + UART_IR_REG); + u32 val = __raw_readl(base + UART_IR_REG); if (val & UART_IR_STAT(UART_IR_TXEMPTY)) break; } while (1); @@ -288,7 +288,7 @@ static inline void _debug_uart_putc(int ch) void __iomem *base = (void __iomem *)CONFIG_DEBUG_UART_BASE; wait_xfered(base); - writel_be(ch, base + UART_FIFO_REG); + __raw_writel(ch, base + UART_FIFO_REG); wait_xfered(base); }
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> --- drivers/serial/serial_bcm6345.c | 100 ++++++++++++++++++++-------------------- 1 file changed, 50 insertions(+), 50 deletions(-)