From patchwork Fri Nov 30 11:36:51 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anup Patel X-Patchwork-Id: 1005900 X-Patchwork-Delegate: uboot@andestech.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=brainfault.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=brainfault-org.20150623.gappssmtp.com header.i=@brainfault-org.20150623.gappssmtp.com header.b="UbnVztcL"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 435spr5Nskz9s9m for ; Fri, 30 Nov 2018 22:38:44 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 5BBB3C2246F; Fri, 30 Nov 2018 11:38:06 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=-0.0 required=5.0 tests=RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id B15EFC22479; Fri, 30 Nov 2018 11:37:46 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 22DF5C22470; Fri, 30 Nov 2018 11:37:19 +0000 (UTC) Received: from mail-pg1-f193.google.com (mail-pg1-f193.google.com [209.85.215.193]) by lists.denx.de (Postfix) with ESMTPS id D1804C223F4 for ; Fri, 30 Nov 2018 11:37:15 +0000 (UTC) Received: by mail-pg1-f193.google.com with SMTP id n2so2402359pgm.3 for ; Fri, 30 Nov 2018 03:37:15 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=brainfault-org.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=cKbxcUi8EFtXRX6ZKTRteFrEA1MNrvc3hL5H4tJKH1Y=; b=UbnVztcL0gkJp312WTqAcVHV3jJxW26JvfpA0MmgLufdxvpdOg1yry06P2+fxQ0JjO fqXzteJb5zTJKHoQoOjQzrfBuT3aZ0qRWp5xoztSXZJ9iH/3XJ4kWDb3EClpRTzfzAbx gvatxEecygfCXu8xJ3BxxFRcFlFR9fToMlD940Z09CETHhsnbvB4y6qu1snViLUI5vbH LkLm7RY7lvKHCvlYosl/Pa/DRALl5xmAxh216GrsHAN4sPs+dvXIi4f8gt4dX7Kz0sHd QP6p3LmtkS9Q/V+Yoc+wstVdSn7e0g5un7dJ0GHhekvwWYwz94Rhop0VfufsiNNF68tq L76g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=cKbxcUi8EFtXRX6ZKTRteFrEA1MNrvc3hL5H4tJKH1Y=; b=NJ+6En23ItNkEYdQ12tF5Mkjf9SuT1dmfwg4Ikz3/78T5ku/Sr26Nk/Y6/jXJkIx9d gI26WZEH+vNHInSQSbNCSitowYu1d+xPf4xWJz2GOQxhSS5rk1RRI9yWWj6Vnsp/mmNZ JqMN9oWX9zhXNppg0MO086kmOvy3KJRVUNB17ikff9M1JphZ02g6wxZrcEFugHV1nYP5 geixZhyC5Qq1ItYCzP01BVXYzY3KsS6r2DDholSczmz2v7BHyO1yGrkZ/Rb7JyKIXPkc QJdwAOq2mxVRGOJjLVuVUx97YPzjR3DHJACZXWYBCD3+peaOI0FXeK/KFrUHJ8AE59+I asfg== X-Gm-Message-State: AA+aEWagWeLDj/t3eUZVgxLPfERI5ciRqlTXlmYPBT1MRZ5mMV8p0Cea rvKjJgC0CSZ1ObCc2Bmf38zxtA== X-Google-Smtp-Source: AFSGD/UGxk4rX9QHLumMKmhoHfE9Rpy7LdxbzQFeo9ITce+noJJtTzpOxSptSO52wn8qVMDaEwzMWA== X-Received: by 2002:a62:6ec8:: with SMTP id j191mr5266854pfc.198.1543577834176; Fri, 30 Nov 2018 03:37:14 -0800 (PST) Received: from anup-ubuntu64.qualcomm.com ([49.207.52.208]) by smtp.googlemail.com with ESMTPSA id g15sm23603506pfj.131.2018.11.30.03.37.10 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 30 Nov 2018 03:37:13 -0800 (PST) From: Anup Patel To: Rick Chen Date: Fri, 30 Nov 2018 17:06:51 +0530 Message-Id: <20181130113652.7157-3-anup@brainfault.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181130113652.7157-1-anup@brainfault.org> References: <20181130113652.7157-1-anup@brainfault.org> Cc: U-Boot Mailing List , Palmer Dabbelt , Alexander Graf , Christoph Hellwig , Atish Patra Subject: [U-Boot] [PATCH v6 2/3] riscv: qemu: Use different SYS_TEXT_BASE for S-mode X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" When u-boot runs in S-mode, the M-mode runtime firmware (BBL or equivalent) uses memory range in 0x80000000 to 0x80200000. Due to this, we cannot use 0x80000000 as SYS_TEXT_BASE when running in S-mode. Instead for S-mode, we use 0x80200000 as SYS_TEXT_BASE. Even Linux RISC-V kernel ignores/reserves memory range 0x80000000 to 0x80200000 because it runs in S-mode. Signed-off-by: Anup Patel Reviewed-by: Bin Meng Tested-by: Bin Meng Reviewed-by: Lukas Auer --- board/emulation/qemu-riscv/Kconfig | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/board/emulation/qemu-riscv/Kconfig b/board/emulation/qemu-riscv/Kconfig index 33ca253432..56bb5337d4 100644 --- a/board/emulation/qemu-riscv/Kconfig +++ b/board/emulation/qemu-riscv/Kconfig @@ -13,7 +13,8 @@ config SYS_CONFIG_NAME default "qemu-riscv" config SYS_TEXT_BASE - default 0x80000000 + default 0x80000000 if !RISCV_SMODE + default 0x80200000 if RISCV_SMODE config BOARD_SPECIFIC_OPTIONS # dummy def_bool y