From patchwork Mon Nov 26 10:39:08 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anup Patel X-Patchwork-Id: 1003121 X-Patchwork-Delegate: uboot@andestech.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=brainfault.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=brainfault-org.20150623.gappssmtp.com header.i=@brainfault-org.20150623.gappssmtp.com header.b="TPlGwqCR"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 433Nq54h0Dz9s5c for ; Mon, 26 Nov 2018 21:45:21 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 5B887C21ECC; Mon, 26 Nov 2018 10:44:08 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=-0.0 required=5.0 tests=RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 6AE7DC21ECC; Mon, 26 Nov 2018 10:43:46 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 03F53C21ECC; Mon, 26 Nov 2018 10:43:38 +0000 (UTC) Received: from mail-pf1-f195.google.com (mail-pf1-f195.google.com [209.85.210.195]) by lists.denx.de (Postfix) with ESMTPS id 7A384C21FE7 for ; Mon, 26 Nov 2018 10:43:34 +0000 (UTC) Received: by mail-pf1-f195.google.com with SMTP id c123so5683309pfb.0 for ; Mon, 26 Nov 2018 02:43:34 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=brainfault-org.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=cKbxcUi8EFtXRX6ZKTRteFrEA1MNrvc3hL5H4tJKH1Y=; b=TPlGwqCR8FrZ8TM8UbdHP9g47mdINDx9txh9cy8xPMs+B/qt8MBVt+2+T2O8q+i8hA Rg65R/EwXeV23tOWEiGPB13QOvMrYtzVfLXoGeYwghQcJxPCA+vT5qxLsnj9MCxqOxsk vBEgM3S8K84ekYhIo2e0gTLH7dBrp1XJt4pHp39xO2W5h8ESbCBcWJlj/0DEFSNXaGi3 ZK5geoY1yOtUXao9wD/hKc6Z6hshgLOMjjsQvn+UDvr3Mk/tR3IdRVUFJ9j2Ai6QXtmQ 0j4egNm2oscUIWjnJAq43nHOuPKPm3Mi9GW9T33ilK6PbipTLQwnhrYxtaszTYOhHL8D hguQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=cKbxcUi8EFtXRX6ZKTRteFrEA1MNrvc3hL5H4tJKH1Y=; b=GYOqtS7zdEV0CmDkZfwfjcORNoNArQaRNpcCbzqB+0GrBLNt4O+3i3haP74hSlCzzQ y5qr4mKbRBJAZpxwEfnHABIeP/SDUfGLlMt83Pkgtkt0Z5Tmo8X/0jTfy83SGfdiihx8 sYekaDVkh3Cpz/gY0i2GELPT9UeBR9qnHQe/Q2xjHZt7DHdDpzc9P8dUtPpha9ZfaFMh pX8+KD50NmghOsIP/D3tSEEsF40U/tBNyULGRoOJG34snB2WR7aGULfxvs4UYiDxkbiD dsy5K2GJsOZJUdQgisGxdfu7IMpQjhums6fr17i9+I9MthKEFJgsLwamMqXtrWBCEylP TpxA== X-Gm-Message-State: AA+aEWb6l2lqQesqSKtVaPm76TQu+PUGrkg2oara/XBtI7ByG2BUtIil /j+Rna9ycRPeWXX1k4yX1n79FkW8ZQM= X-Google-Smtp-Source: AFSGD/VFhWyFnNBp/nQUlLfGCMqZaqw6NjYssWrMetUL9cdwGve15pMoMm1zo1jOanRR0HUMk4umNg== X-Received: by 2002:a63:2ac9:: with SMTP id q192mr24281041pgq.58.1543229012957; Mon, 26 Nov 2018 02:43:32 -0800 (PST) Received: from anup-ubuntu64.qualcomm.com ([49.207.53.74]) by smtp.googlemail.com with ESMTPSA id x125-v6sm9627186pfx.38.2018.11.26.02.43.29 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 26 Nov 2018 02:43:32 -0800 (PST) From: Anup Patel To: Rick Chen Date: Mon, 26 Nov 2018 16:09:08 +0530 Message-Id: <20181126103910.14457-3-anup@brainfault.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181126103910.14457-1-anup@brainfault.org> References: <20181126103910.14457-1-anup@brainfault.org> Cc: U-Boot Mailing List , Palmer Dabbelt , Alexander Graf , Christoph Hellwig , Atish Patra Subject: [U-Boot] [PATCH v5 2/4] riscv: qemu: Use different SYS_TEXT_BASE for S-mode X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" When u-boot runs in S-mode, the M-mode runtime firmware (BBL or equivalent) uses memory range in 0x80000000 to 0x80200000. Due to this, we cannot use 0x80000000 as SYS_TEXT_BASE when running in S-mode. Instead for S-mode, we use 0x80200000 as SYS_TEXT_BASE. Even Linux RISC-V kernel ignores/reserves memory range 0x80000000 to 0x80200000 because it runs in S-mode. Signed-off-by: Anup Patel Reviewed-by: Bin Meng Tested-by: Bin Meng Reviewed-by: Lukas Auer --- board/emulation/qemu-riscv/Kconfig | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/board/emulation/qemu-riscv/Kconfig b/board/emulation/qemu-riscv/Kconfig index 33ca253432..56bb5337d4 100644 --- a/board/emulation/qemu-riscv/Kconfig +++ b/board/emulation/qemu-riscv/Kconfig @@ -13,7 +13,8 @@ config SYS_CONFIG_NAME default "qemu-riscv" config SYS_TEXT_BASE - default 0x80000000 + default 0x80000000 if !RISCV_SMODE + default 0x80200000 if RISCV_SMODE config BOARD_SPECIFIC_OPTIONS # dummy def_bool y