From patchwork Thu Nov 22 04:45:02 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anup Patel X-Patchwork-Id: 1001536 X-Patchwork-Delegate: uboot@andestech.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=brainfault.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=brainfault-org.20150623.gappssmtp.com header.i=@brainfault-org.20150623.gappssmtp.com header.b="t/8XAVxJ"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 430n3s1Chfz9s5c for ; Thu, 22 Nov 2018 15:47:21 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id E421FC21EFB; Thu, 22 Nov 2018 04:46:02 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=-0.0 required=5.0 tests=RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 557A6C21EB1; Thu, 22 Nov 2018 04:46:00 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id B2624C21F02; Thu, 22 Nov 2018 04:45:33 +0000 (UTC) Received: from mail-pl1-f194.google.com (mail-pl1-f194.google.com [209.85.214.194]) by lists.denx.de (Postfix) with ESMTPS id E669AC21F02 for ; Thu, 22 Nov 2018 04:45:29 +0000 (UTC) Received: by mail-pl1-f194.google.com with SMTP id u6so8587454plm.8 for ; Wed, 21 Nov 2018 20:45:29 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=brainfault-org.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=cKbxcUi8EFtXRX6ZKTRteFrEA1MNrvc3hL5H4tJKH1Y=; b=t/8XAVxJeWactf9CXVMGaxPAp4lme67U9xgX0EhxTafF13UBV1CCuQ+s0d9LniK+4M Lx2tdGiF59Wmsmjolk0/S/WgINv0ROWrEndrLioTtjDLbcjgYIz3ZQpaAPxQt/mK8vc2 mJjx6wqu9EPLSUPtkQ7km9q5E1tSHmcoESjCu8oJYItIht4ucQTRsPzCNT2TTQzpBsyw +HT6L3GZCQTHxrl5gbL9zVx8rBh1fLLqWqhvdnUNSbclLggT/9QuhuQQRSWwqkyPrBjT Vg5JPgzD7CwD81t1H0ihfmbbcn9zSrX5IqkwSZUFH745bl0wke4nzqD3SJsiV0lo2z6Z pxgA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=cKbxcUi8EFtXRX6ZKTRteFrEA1MNrvc3hL5H4tJKH1Y=; b=uZLOuMlYhWDlEw5D2029Oda8BSSAjpeBKzT5dNDWJV/CkvccuXX+XmLc8i+pxtrwgO 3Be4Nugf2w5K2yxmWqRzhiXH6Y36NB3tJRr8par87s0ym487sThnS6i2Eyj1Q9NuPmUJ Cb9TEseeP/3PJHHs3tKlqy5vwztaZ6EKCOd8Eodys/7iN5p/PHNghuVeWVm2f4/1TtSD vT2fPgAxaXAOQAHP+XhEshE9sK3rGqUb4yn/8z30X0B4cKdMSElo+TLoUf64Ebcp8f7I P+ynLmNIcMopTdguZOOJTBLTy5ZsArMCEA/PydIIEj/tzIJPhRbspAg0uMSYgIPgu1Gg a/3A== X-Gm-Message-State: AA+aEWbpFlEuz6iyGnN6cxj8K6uXpSE7nn2TbCQdFXIC+32t9sX4/viU 1v6nozO3BylACpZ/RBtNL7KP5A== X-Google-Smtp-Source: AFSGD/W17SQsOnA3J8a3CXkwlbTn3g9fSiXWtcljX0dIzJA8ZL45F2zQ1kQ+mpSlCGXTiS0YRUO5Qg== X-Received: by 2002:a17:902:bb0a:: with SMTP id l10-v6mr9902053pls.230.1542861928342; Wed, 21 Nov 2018 20:45:28 -0800 (PST) Received: from anup-ubuntu64.qualcomm.com ([49.207.51.56]) by smtp.googlemail.com with ESMTPSA id o23-v6sm30869636pfa.112.2018.11.21.20.45.25 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 21 Nov 2018 20:45:27 -0800 (PST) From: Anup Patel To: Rick Chen Date: Thu, 22 Nov 2018 10:15:02 +0530 Message-Id: <20181122044503.18334-3-anup@brainfault.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181122044503.18334-1-anup@brainfault.org> References: <20181122044503.18334-1-anup@brainfault.org> Cc: U-Boot Mailing List , Palmer Dabbelt , Alexander Graf , Christoph Hellwig , Atish Patra Subject: [U-Boot] [PATCH v4 2/3] riscv: qemu: Use different SYS_TEXT_BASE for S-mode X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" When u-boot runs in S-mode, the M-mode runtime firmware (BBL or equivalent) uses memory range in 0x80000000 to 0x80200000. Due to this, we cannot use 0x80000000 as SYS_TEXT_BASE when running in S-mode. Instead for S-mode, we use 0x80200000 as SYS_TEXT_BASE. Even Linux RISC-V kernel ignores/reserves memory range 0x80000000 to 0x80200000 because it runs in S-mode. Signed-off-by: Anup Patel Reviewed-by: Bin Meng Tested-by: Bin Meng Reviewed-by: Lukas Auer --- board/emulation/qemu-riscv/Kconfig | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/board/emulation/qemu-riscv/Kconfig b/board/emulation/qemu-riscv/Kconfig index 33ca253432..56bb5337d4 100644 --- a/board/emulation/qemu-riscv/Kconfig +++ b/board/emulation/qemu-riscv/Kconfig @@ -13,7 +13,8 @@ config SYS_CONFIG_NAME default "qemu-riscv" config SYS_TEXT_BASE - default 0x80000000 + default 0x80000000 if !RISCV_SMODE + default 0x80200000 if RISCV_SMODE config BOARD_SPECIFIC_OPTIONS # dummy def_bool y