From patchwork Tue Nov 20 11:29:30 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anup Patel X-Patchwork-Id: 1000410 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=brainfault.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=brainfault-org.20150623.gappssmtp.com header.i=@brainfault-org.20150623.gappssmtp.com header.b="z6cLWMT8"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 42zk5F49swz9s3l for ; Tue, 20 Nov 2018 22:29:53 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 4A0ECC22022; Tue, 20 Nov 2018 11:29:51 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=-0.0 required=5.0 tests=RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 837F5C21FFB; Tue, 20 Nov 2018 11:29:49 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 2F439C21FFB; Tue, 20 Nov 2018 11:29:48 +0000 (UTC) Received: from mail-pf1-f195.google.com (mail-pf1-f195.google.com [209.85.210.195]) by lists.denx.de (Postfix) with ESMTPS id 7D490C21FF3 for ; Tue, 20 Nov 2018 11:29:47 +0000 (UTC) Received: by mail-pf1-f195.google.com with SMTP id g62so851311pfd.12 for ; Tue, 20 Nov 2018 03:29:47 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=brainfault-org.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id; bh=+aRCLUbbWueJX33/UFwlLKiRiNGUQpWjChk6SXr9sLI=; b=z6cLWMT8JerUXBccMJM3lx7Um0JQtG61AyGOlE3oymfQQ0HDuMRCdZMH+h9lwLAvKt 54Wn8ijkl5uDjsJn7LbX+zNoHwQ9/uDFrCyOnURyfT6yJrhe7kDUdZY2WZJq/XNDej4k Fc2aOLryK6eMUrGi0BYCkdPDKQJcFV+1M0O9pajNMsUTYSO7XGb4ltpVax/q7qYcjC55 GpFme5fQd1mxNX69RB0gQ81J7NTFbseosxXltqDNLUhSGopRqQM5dqP0i806hBjrqlhe EG0bdv2gwqPe9VTPGtpXMDG9f4Mdb+tShQxbOOXqPDMTuMf91T65haIZKAcM87izfsUQ Q56Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=+aRCLUbbWueJX33/UFwlLKiRiNGUQpWjChk6SXr9sLI=; b=S4k38w4LM+lz0Cr1jeYur5aZZFBpCzwtTOD4bFzFMb+2vVFF7aceJJ2WL9HLryMZDa //PYmrKIwf+wiuWCM9pZHX4Ng2HF6jc/7OH3HTou49CRgMY1D4+dEq+yoxqz4Grrv5EW 7K1u+UlWJKDGMNYRLRX1pFU3KM2NiCVIPjPf+xduJuV3f1bAWUPhsN9+SlaR6nDNXEzH wztway2j4NxZR5niYyG+X3eSX0kozgLhDKx/cPafoguDwOOvp+P+1qVGRaPWmB4fSksU th7kYEPsGmkH5x+Ncp6mLuA9CzHjSrtFnSp2LsRDBwmX0+DJQLAAB0QoHK2CxLjoLiSE C0Kg== X-Gm-Message-State: AGRZ1gJvDLxOVn3ci9TeEI1GSvjQPc7owwYnNzbFb796ZgTYTnzSLwNx R5muth29tj6mDLl64QlNZaMDpQ== X-Google-Smtp-Source: AJdET5fCNHF4i6jk6QvMUlAfW+lCUnaPERKDwtaDZM8dna9/Cxdh6C96gYoDHkfLm6XQFP/zXxDVlQ== X-Received: by 2002:a62:2606:: with SMTP id m6mr1709104pfm.133.1542713385555; Tue, 20 Nov 2018 03:29:45 -0800 (PST) Received: from localhost.localdomain ([106.51.16.59]) by smtp.googlemail.com with ESMTPSA id m10-v6sm97725026pfg.180.2018.11.20.03.29.42 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 20 Nov 2018 03:29:44 -0800 (PST) From: Anup Patel To: Rick Chen Date: Tue, 20 Nov 2018 16:59:30 +0530 Message-Id: <20181120112933.23700-1-anup@brainfault.org> X-Mailer: git-send-email 2.17.1 Cc: U-Boot Mailing List , Palmer Dabbelt , Alexander Graf , Christoph Hellwig , Atish Patra Subject: [U-Boot] [PATCH v2 0/3] RISC-V S-mode support X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" This patchset allows us runing u-boot in S-mode which is useful on platforms where M-mode runtime firmware is an independent firmware and u-boot is used as last stage OS bootloader. The patchset based upon git://git.denx.de/u-boot-riscv.git and is tested on QEMU in both M-mode and S-mode. For S-mode testing, we have used u-boot.bin as payload of latest BBL (at commit 6ebd0f2a46255d0c76dad3c05b16c1d154795d26) applied with following changes: Changes since v1: - Rebased upon latest git://git.denx.de/u-boot-riscv.git - Add details in cover letter for running u-boot in S-mode using BBL Anup Patel (3): riscv: Add kconfig option to run u-boot in S-mode riscv: qemu: Use different SYS_TEXT_BASE for S-mode riscv: Add S-mode defconfigs for QEMU virt machine arch/riscv/Kconfig | 6 +++++ arch/riscv/cpu/start.S | 33 ++++++++++++++++++++++++++++ board/emulation/qemu-riscv/Kconfig | 3 ++- configs/qemu-riscv32-smode_defconfig | 10 +++++++++ configs/qemu-riscv64-smode_defconfig | 11 ++++++++++ 5 files changed, 62 insertions(+), 1 deletion(-) create mode 100644 configs/qemu-riscv32-smode_defconfig create mode 100644 configs/qemu-riscv64-smode_defconfig diff --git a/machine/emulation.c b/machine/emulation.c index 132e977..def75e1 100644 --- a/machine/emulation.c +++ b/machine/emulation.c @@ -162,6 +162,12 @@ static inline int emulate_read_csr(int num, uintptr_t mstatus, uintptr_t* result switch (num) { + case CSR_MISA: + *result = read_csr(misa); + return 0; + case CSR_MHARTID: + *result = read_csr(mhartid); + return 0; case CSR_CYCLE: if (!((counteren >> (CSR_CYCLE - CSR_CYCLE)) & 1)) return -1;