From patchwork Tue Nov 20 09:14:18 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Anup Patel X-Patchwork-Id: 1000318 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=brainfault.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=brainfault-org.20150623.gappssmtp.com header.i=@brainfault-org.20150623.gappssmtp.com header.b="CUt9PSDi"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 42zg6x5T7Yz9s1x for ; Tue, 20 Nov 2018 20:16:09 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 72F0EC22002; Tue, 20 Nov 2018 09:15:11 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=-0.0 required=5.0 tests=RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 8349EC22008; Tue, 20 Nov 2018 09:14:51 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 825CDC22009; Tue, 20 Nov 2018 09:14:45 +0000 (UTC) Received: from mail-pf1-f194.google.com (mail-pf1-f194.google.com [209.85.210.194]) by lists.denx.de (Postfix) with ESMTPS id 371A0C21FFC for ; Tue, 20 Nov 2018 09:14:42 +0000 (UTC) Received: by mail-pf1-f194.google.com with SMTP id c72so696848pfc.6 for ; Tue, 20 Nov 2018 01:14:42 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=brainfault-org.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=L7/gZMDfD/ZQ5gcnUII3tAkKnIRYDI5uWAnD6FR5aew=; b=CUt9PSDi/+8mkW0VQPRzW8q6a0X3eFDVd2AzYsNzRvUvVIkqjnIdqGnk40XwFNvNJM jgCFjBcHOIVjTmHz/ZBqTrPvoFXeIzKIiYueTVaEltxW68RKYWA1YzipZF3et7DZitCf O6p/raRICVJ8uWiekLayfUkrit8qTSnSPlvDr3v2VnPJjcZPpyYW9NxJCb3aqZi8aKyp H+oLs0wvmwhbGcQVLa4/zg5O0fVSD1eBsvgQd5Qj+dR9BXpeEenkm+wEX5w+all3mJgE Jz/8+0yG69+Dste0D2oE272ll8dBI0IUgDEeU5s7GXCmriLASSVbEO3iQAZokp0/rmvT tcjQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=L7/gZMDfD/ZQ5gcnUII3tAkKnIRYDI5uWAnD6FR5aew=; b=DImY4/IeEJafkZT9dhpSWtIP9CDBwO702HKzuaFA40Gi72Sig1WYBFHtziTa8UXyt6 N+IrJzHPlhe7Hbr6mexxjIqFAOs8PyOu9Nlyzo/j/vjf6SrxEsRHx4H46b3gwiMXD19M k2ppBGcsQGRc4hCvu4d6TRVVtAMydMPTTcQ04HJvxAAzmg/4R2Zy+CYG5rea9po/z0C8 aooy7Pxk3ikjD2nf1+kygTZ32D+KxdqrLuCC5d5+GCgTZ6CbciInNRyW6ilBVqfsfbJu Fdvj411z72l08DCkrt7GTJau8oPsstORb7M+VXk+mjuOLxa1R1lIRSSSf3uvLT2TJS9X YbOA== X-Gm-Message-State: AA+aEWZr3gsy4MfL/H1qah0ywP2fPt+N10gnAG/8GX0NJuURuKV3h0n9 3v0BcvTS4IWtLNYOxVXUZok4Ow== X-Google-Smtp-Source: AFSGD/UObX0n/bRSnLio7fG2md6RqYbOGbl+gEbqreB6FZaeITGYuPeE3y99RLgqDOUPnGQfU1KcZw== X-Received: by 2002:a63:8c2:: with SMTP id 185mr1236831pgi.26.1542705280683; Tue, 20 Nov 2018 01:14:40 -0800 (PST) Received: from localhost.localdomain ([106.51.16.59]) by smtp.googlemail.com with ESMTPSA id d80sm92810987pfm.146.2018.11.20.01.14.37 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 20 Nov 2018 01:14:39 -0800 (PST) From: Anup Patel To: Rick Chen Date: Tue, 20 Nov 2018 14:44:18 +0530 Message-Id: <20181120091419.6575-3-anup@brainfault.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20181120091419.6575-1-anup@brainfault.org> References: <20181120091419.6575-1-anup@brainfault.org> Cc: U-Boot Mailing List , Palmer Dabbelt , Alexander Graf , Christoph Hellwig , Atish Patra Subject: [U-Boot] [PATCH 2/3] riscv: qemu: Use different SYS_TEXT_BASE for S-mode X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" When u-boot runs in S-mode, the M-mode runtime firmware (BBL or equivalent) uses memory range in 0x80000000 to 0x80200000. Due to this, we cannot use 0x80000000 as SYS_TEXT_BASE when running in S-mode. Instead for S-mode, we use 0x80200000 as SYS_TEXT_BASE. Even Linux RISC-V kernel ignores/reserves memory range 0x80000000 to 0x80200000 because it runs in S-mode. Signed-off-by: Anup Patel --- board/emulation/qemu-riscv/Kconfig | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/board/emulation/qemu-riscv/Kconfig b/board/emulation/qemu-riscv/Kconfig index 37a80db6a9..88f56f30e5 100644 --- a/board/emulation/qemu-riscv/Kconfig +++ b/board/emulation/qemu-riscv/Kconfig @@ -13,7 +13,8 @@ config SYS_CONFIG_NAME default "qemu-riscv" config SYS_TEXT_BASE - default 0x80000000 + default 0x80000000 if !RISCV_SMODE + default 0x80200000 if RISCV_SMODE config BOARD_SPECIFIC_OPTIONS # dummy def_bool y