From patchwork Fri Nov 9 12:59:15 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lukas Auer X-Patchwork-Id: 995517 X-Patchwork-Delegate: uboot@andestech.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=aisec.fraunhofer.de Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 42s0wK4bP6z9sBZ for ; Sat, 10 Nov 2018 00:13:53 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 484AAC22577; Fri, 9 Nov 2018 13:08:03 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=RCVD_IN_DNSWL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 87369C225CC; Fri, 9 Nov 2018 13:01:05 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 61234C225C5; Fri, 9 Nov 2018 13:00:23 +0000 (UTC) Received: from mail-edgeS23.fraunhofer.de (mail-edges23.fraunhofer.de [153.97.7.23]) by lists.denx.de (Postfix) with ESMTPS id B9D03C22548 for ; Fri, 9 Nov 2018 13:00:17 +0000 (UTC) X-IronPort-Anti-Spam-Filtered: true X-IronPort-Anti-Spam-Result: A2EKAAAmhOVb/xoHYZlkGgEBAQEBAgEBAQEHAgEBAQGBUwMBAQEBCwGCA4FWOYxvli2OLoF6DYRsAoMiIjYLDQEDAQECAQECAgJpHAyFPAZ0BRBRITYGDgWDIYFqAxQBqQWHeg2CGQkBh0iEKoFYP4ERhWiCdYUOAohtljEuBwKBEYEHBItSgyALGIlPhx+CdIsxiUyBSgMvgVUzGiSDO4YBilo+ATIBjUMBAQ X-IPAS-Result: A2EKAAAmhOVb/xoHYZlkGgEBAQEBAgEBAQEHAgEBAQGBUwMBAQEBCwGCA4FWOYxvli2OLoF6DYRsAoMiIjYLDQEDAQECAQECAgJpHAyFPAZ0BRBRITYGDgWDIYFqAxQBqQWHeg2CGQkBh0iEKoFYP4ERhWiCdYUOAohtljEuBwKBEYEHBItSgyALGIlPhx+CdIsxiUyBSgMvgVUzGiSDO4YBilo+ATIBjUMBAQ X-IronPort-AV: E=Sophos;i="5.54,483,1534802400"; d="scan'208";a="7622523" Received: from mail-mtas26.fraunhofer.de ([153.97.7.26]) by mail-edgeS23.fraunhofer.de with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 09 Nov 2018 14:00:17 +0100 X-IronPort-Anti-Spam-Filtered: true X-IronPort-Anti-Spam-Result: A0BPAADxg+Vb/xBhWMBkHAEBAQQBAQcEAQGBUwUBAQsBgzghOYxvli2OLoF6DYRsAoNDNgsNAQMBAQIBAQJtHAyFOwZ0BRBRITYGDgWDIYFqAxWpBId6DYIZCQGHSIYCP4ERhWiCdYUOAohtljEuBwKBEYEHBItSgyALGIlPhx+CdIsxiUyBSgMugVUzGiSDO4YBilo+AzABjUMBAQ X-IronPort-AV: E=Sophos;i="5.54,483,1534802400"; d="scan'208";a="51714157" Received: from fgdemucivp01ltm.xch.fraunhofer.de (HELO FGDEMUCIMP12EXC.ads.fraunhofer.de) ([192.88.97.16]) by mail-mtaS26.fraunhofer.de with ESMTP/TLS/AES256-SHA; 09 Nov 2018 14:00:16 +0100 Received: from muc-nb-035.aisec.fraunhofer.de (10.80.233.51) by FGDEMUCIMP12EXC.ads.fraunhofer.de (10.80.232.43) with Microsoft SMTP Server (TLS) id 14.3.408.0; Fri, 9 Nov 2018 14:00:16 +0100 From: Lukas Auer To: Date: Fri, 9 Nov 2018 13:59:15 +0100 Message-ID: <20181109125923.7034-21-lukas.auer@aisec.fraunhofer.de> X-Mailer: git-send-email 2.17.2 In-Reply-To: <20181109125923.7034-1-lukas.auer@aisec.fraunhofer.de> References: <20181109125923.7034-1-lukas.auer@aisec.fraunhofer.de> MIME-Version: 1.0 X-TM-AS-Product-Ver: SMEX-11.0.0.4179-8.200.1013-24212.007 X-TM-AS-Result: No--8.844700-8.000000-31 X-TM-AS-User-Approved-Sender: No X-TM-AS-User-Blocked-Sender: No Cc: Greentime Hu Subject: [U-Boot] [PATCH v3 20/28] riscv: save hart ID and device tree passed by prior boot stage X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Store the hart ID and device tree passed by the prior boot stage (in a0 and a1) in registers s0 and s1. Replace one use of s1 in start.S to avoid overwriting it. The device tree is also stored in memory to make it available to U-Boot with the configuration CONFIG_OF_PRIOR_STAGE. Signed-off-by: Lukas Auer Reviewed-by: Bin Meng Reviewed-by: Rick Chen --- Changes in v3: None Changes in v2: None arch/riscv/cpu/cpu.c | 6 ++++++ arch/riscv/cpu/start.S | 12 ++++++++++-- 2 files changed, 16 insertions(+), 2 deletions(-) diff --git a/arch/riscv/cpu/cpu.c b/arch/riscv/cpu/cpu.c index ae57fb8313..d9f820c44c 100644 --- a/arch/riscv/cpu/cpu.c +++ b/arch/riscv/cpu/cpu.c @@ -6,6 +6,12 @@ #include #include +/* + * prior_stage_fdt_address must be stored in the data section since it is used + * before the bss section is available. + */ +phys_addr_t prior_stage_fdt_address __attribute__((section(".data"))); + enum { ISA_INVALID = 0, ISA_32BIT, diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S index b01ea6e224..331a5345e3 100644 --- a/arch/riscv/cpu/start.S +++ b/arch/riscv/cpu/start.S @@ -34,6 +34,10 @@ .section .text .globl _start _start: + /* save hart id and dtb pointer */ + mv s0, a0 + mv s1, a1 + li t0, CONFIG_SYS_SDRAM_BASE SREG a2, 0(t0) la t0, trap_entry @@ -58,6 +62,10 @@ call_board_init_f_0: mv a0, sp jal board_init_f_alloc_reserve mv sp, a0 + + la t0, prior_stage_fdt_address + SREG s1, 0(t0) + jal board_init_f_init_reserve mv a0, zero /* a0 <-- boot_flags = 0 */ @@ -140,8 +148,8 @@ fix_rela_dyn: LREG t3, -(REGBYTES*3)(t1) li t5, SYM_SIZE mul t0, t0, t5 - add s1, t4, t0 - LREG t5, REGBYTES(s1) + add s5, t4, t0 + LREG t5, REGBYTES(s5) add t5, t5, t6 /* t5 <-- location to fix up in RAM */ add t3, t3, t6 /* t3 <-- location to fix up in RAM */ SREG t5, 0(t3)