From patchwork Fri Nov 9 12:59:11 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lukas Auer X-Patchwork-Id: 995521 X-Patchwork-Delegate: uboot@andestech.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=aisec.fraunhofer.de Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 42s0xn2DPjz9sCs for ; Sat, 10 Nov 2018 00:15:09 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 027B5C22564; Fri, 9 Nov 2018 13:07:28 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=RCVD_IN_DNSWL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 6BD41C22556; Fri, 9 Nov 2018 13:00:56 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 5119AC22582; Fri, 9 Nov 2018 13:00:19 +0000 (UTC) Received: from mail-edgeS23.fraunhofer.de (mail-edges23.fraunhofer.de [153.97.7.23]) by lists.denx.de (Postfix) with ESMTPS id E9AABC22579 for ; Fri, 9 Nov 2018 13:00:13 +0000 (UTC) X-IronPort-Anti-Spam-Filtered: true X-IronPort-Anti-Spam-Result: A2EVAAAmhOVb/xoHYZlkGgEBAQEBAgEBAQEHAgEBAQGBVAIBAQEBCwGCA4FWOYxvli2QKA2EbAKDIiI3Cg0BAwEBAgEBAgICaRwMhTwGeRBRITYGDgWDIYFqAxQBqQWHeg2CGQkBh0iEKoFYP4Z5gXGBBIUOAp8eLgcCgRGBBwSLUoMgCxiJT4cfjiWJTIFZI4FVMxokgzuGAYpaPgEyAYp2gk0BAQ X-IPAS-Result: A2EVAAAmhOVb/xoHYZlkGgEBAQEBAgEBAQEHAgEBAQGBVAIBAQEBCwGCA4FWOYxvli2QKA2EbAKDIiI3Cg0BAwEBAgEBAgICaRwMhTwGeRBRITYGDgWDIYFqAxQBqQWHeg2CGQkBh0iEKoFYP4Z5gXGBBIUOAp8eLgcCgRGBBwSLUoMgCxiJT4cfjiWJTIFZI4FVMxokgzuGAYpaPgEyAYp2gk0BAQ X-IronPort-AV: E=Sophos;i="5.54,483,1534802400"; d="scan'208";a="7622516" Received: from mail-mtas26.fraunhofer.de ([153.97.7.26]) by mail-edgeS23.fraunhofer.de with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 09 Nov 2018 14:00:13 +0100 X-IronPort-Anti-Spam-Filtered: true X-IronPort-Anti-Spam-Result: A0CkAADxg+Vb/xBhWMBkHAEBAQQBAQcEAQGBVAQBAQsBgzghOYxvli2QKA2EbAKDQzcKDQEDAQECAQECbRwMhTsGeRBRITYGDgWDIYFqAxWpBId6DYIZCQGHSIYCP4Z5gXGBBIUOAp8eLgcCgRGBBwSLUoMgCxiJT4cfjiWJTIFZIoFVMxokgzuGAYpaPgMwAYp2gk0BAQ X-IronPort-AV: E=Sophos;i="5.54,483,1534802400"; d="scan'208";a="51714144" Received: from fgdemucivp01ltm.xch.fraunhofer.de (HELO FGDEMUCIMP12EXC.ads.fraunhofer.de) ([192.88.97.16]) by mail-mtaS26.fraunhofer.de with ESMTP/TLS/AES256-SHA; 09 Nov 2018 14:00:13 +0100 Received: from muc-nb-035.aisec.fraunhofer.de (10.80.233.51) by FGDEMUCIMP12EXC.ads.fraunhofer.de (10.80.232.43) with Microsoft SMTP Server (TLS) id 14.3.408.0; Fri, 9 Nov 2018 14:00:12 +0100 From: Lukas Auer To: Date: Fri, 9 Nov 2018 13:59:11 +0100 Message-ID: <20181109125923.7034-17-lukas.auer@aisec.fraunhofer.de> X-Mailer: git-send-email 2.17.2 In-Reply-To: <20181109125923.7034-1-lukas.auer@aisec.fraunhofer.de> References: <20181109125923.7034-1-lukas.auer@aisec.fraunhofer.de> MIME-Version: 1.0 X-TM-AS-Product-Ver: SMEX-11.0.0.4179-8.200.1013-24212.007 X-TM-AS-Result: No--2.743100-8.000000-31 X-TM-AS-User-Approved-Sender: No X-TM-AS-User-Blocked-Sender: No Cc: Greentime Hu Subject: [U-Boot] [PATCH v3 16/28] riscv: align mtvec on a 4-byte boundary X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" The machine trap-vector base address (mtvec) must be aligned on a 4-byte boundary. Add the necessary align directive to trap_entry. This patch also removes the global directive for trap_entry, which is not required. Signed-off-by: Lukas Auer Reviewed-by: Bin Meng --- Changes in v3: None Changes in v2: None arch/riscv/cpu/start.S | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S index bd5904500c..88b4aaa1c0 100644 --- a/arch/riscv/cpu/start.S +++ b/arch/riscv/cpu/start.S @@ -42,7 +42,6 @@ nmi_vector: trap_vector: j trap_entry -.global trap_entry handle_reset: li t0, CONFIG_SYS_SDRAM_BASE SREG a2, 0(t0) @@ -208,6 +207,7 @@ call_board_init_r: /* * trap entry */ +.align 2 trap_entry: addi sp, sp, -32*REGBYTES SREG x1, 1*REGBYTES(sp)