From patchwork Tue Oct 30 12:55:42 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lukas Auer X-Patchwork-Id: 990835 X-Patchwork-Delegate: uboot@andestech.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=aisec.fraunhofer.de Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 42ksN44f1Zz9s8J for ; Wed, 31 Oct 2018 00:13:08 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 37C90C22127; Tue, 30 Oct 2018 13:01:13 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=RCVD_IN_DNSWL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 00DA2C22143; Tue, 30 Oct 2018 12:57:48 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 5D3FEC22132; Tue, 30 Oct 2018 12:57:26 +0000 (UTC) Received: from mail-edgeKA24.fraunhofer.de (mail-edgeka24.fraunhofer.de [153.96.1.24]) by lists.denx.de (Postfix) with ESMTPS id A0BEDC2211F for ; Tue, 30 Oct 2018 12:57:22 +0000 (UTC) X-IronPort-Anti-Spam-Filtered: true X-IronPort-Anti-Spam-Result: A2HpAgC/VNhb/xoBYJlkHAEBAQQBAQcEAQGBZYIFgg2MbY1GiQCJMYUDgWYNhGwCgyUiOBYBAwEBAgEBAgICaRwMhTwGeRAgMSE2Bg4FgyGBagMUAaotiAENghgJAYc3hCaBWD+BEAGFaIIRPYU1Aoh9gWqTey4HAoEOgQQEi0mDHQsYgVKHaCuGYyyNS4kvgVoigVUzGiSDO4V+ilpuAYt3AQE X-IPAS-Result: A2HpAgC/VNhb/xoBYJlkHAEBAQQBAQcEAQGBZYIFgg2MbY1GiQCJMYUDgWYNhGwCgyUiOBYBAwEBAgEBAgICaRwMhTwGeRAgMSE2Bg4FgyGBagMUAaotiAENghgJAYc3hCaBWD+BEAGFaIIRPYU1Aoh9gWqTey4HAoEOgQQEi0mDHQsYgVKHaCuGYyyNS4kvgVoigVUzGiSDO4V+ilpuAYt3AQE X-IronPort-AV: E=Sophos;i="5.54,444,1534802400"; d="scan'208";a="10904646" Received: from mail-mtaka26.fraunhofer.de ([153.96.1.26]) by mail-edgeKA24.fraunhofer.de with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 30 Oct 2018 13:57:22 +0100 X-IronPort-Anti-Spam-Filtered: true X-IronPort-Anti-Spam-Result: A0DCAgCMVNhb/xBhWMBkHAEBAQQBAQcEAQGBZYNYOoxtjUaJAIkxhQOBZg2EbAKDRjgWAQMBAQIBAQJtHAyFOwZ5ECAxITYGDgWDIYFqAxWqLogBDYIYCQGHN4V+P4EQAYVoghE9hTUCiH2BapN7LgcCgQ6BBASLSYMdCxiBUodoK4ZjLI1LiS+BWiGBVTMaJIM7hX6KWj4wAYt3AQE X-IronPort-AV: E=Sophos;i="5.54,444,1534802400"; d="scan'208";a="16525680" Received: from fgdemucivp01ltm.xch.fraunhofer.de (HELO FGDEMUCIMP12EXC.ads.fraunhofer.de) ([192.88.97.16]) by mail-mtaKA26.fraunhofer.de with ESMTP/TLS/AES256-SHA; 30 Oct 2018 13:57:21 +0100 Received: from muc-nb-035.aisec.fraunhofer.de (10.80.233.51) by FGDEMUCIMP12EXC.ads.fraunhofer.de (10.80.232.43) with Microsoft SMTP Server (TLS) id 14.3.408.0; Tue, 30 Oct 2018 13:57:21 +0100 From: Lukas Auer To: Date: Tue, 30 Oct 2018 13:55:42 +0100 Message-ID: <20181030125553.5230-20-lukas.auer@aisec.fraunhofer.de> X-Mailer: git-send-email 2.17.2 In-Reply-To: <20181030125553.5230-1-lukas.auer@aisec.fraunhofer.de> References: <20181030125553.5230-1-lukas.auer@aisec.fraunhofer.de> MIME-Version: 1.0 X-TM-AS-Product-Ver: SMEX-11.0.0.4179-8.200.1013-24188.007 X-TM-AS-Result: No--0.740400-8.000000-31 X-TM-AS-User-Approved-Sender: No X-TM-AS-User-Blocked-Sender: No Cc: Marek Vasut , Stephen Warren , Michal Simek , Macpaul Lin , Greentime Hu Subject: [U-Boot] [PATCH v2 19/29] Drop CONFIG_INIT_CRITICAL X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Bin Meng This is now deprecated and no board is using it. Drop it. Signed-off-by: Bin Meng Reviewed-by: Lukas Auer Signed-off-by: Lukas Auer --- Changes in v2: - New patch to replace patch "riscv: remove CONFIG_INIT_CRITICAL" arch/nds32/cpu/n1213/start.S | 51 ---------------------------------- arch/riscv/cpu/start.S | 13 --------- board/armltd/integrator/README | 4 +-- include/common.h | 5 ---- scripts/config_whitelist.txt | 1 - 5 files changed, 1 insertion(+), 73 deletions(-) diff --git a/arch/nds32/cpu/n1213/start.S b/arch/nds32/cpu/n1213/start.S index aa9457f5e4..cf966e2132 100644 --- a/arch/nds32/cpu/n1213/start.S +++ b/arch/nds32/cpu/n1213/start.S @@ -200,14 +200,6 @@ update_gp: jal turnoff_watchdog #endif -/* - * Do CPU critical regs init only at reboot, - * not when booting from ram - */ -#ifdef CONFIG_INIT_CRITICAL - jal cpu_init_crit ! Do CPU critical regs init -#endif - /* * Set stackpointer in internal RAM to call board_init_f * $sp must be 8-byte alignment for ABI compliance. @@ -318,49 +310,6 @@ call_board_init_r: /* jump to it ... */ jr $lp /* jump to board_init_r() */ -/* - * Initialize CPU critical registers - * - * 1. Setup control registers - * 1.1 Mask all IRQs - * 1.2 Flush cache and TLB - * 1.3 Disable MMU and cache - * 2. Setup memory timing - */ - -cpu_init_crit: - - move $r0, $lp /* push ra */ - - /* Disable Interrupts by clear GIE in $PSW reg */ - setgie.d - - /* Flush caches and TLB */ - /* Invalidate caches */ - jal invalidate_icac - jal invalidate_dcac - - /* Flush TLB */ - mfsr $p0, $MMU_CFG - andi $p0, $p0, 0x3 ! MMPS - li $p1, 0x2 ! TLB MMU - bne $p0, $p1, 1f - tlbop flushall ! Flush TLB - -1: - ! Disable MMU, Dcache - ! Whitiger is MMU disabled when reset - ! Disable the D$ - mfsr $p0, MR_CAC_CTL ! Get the $CACHE_CTL reg - li $p1, DIS_DCAC - and $p0, $p0, $p1 ! Set DC_EN bit - mtsr $p0, MR_CAC_CTL ! write back the $CACHE_CTL reg - isb - - move $lp, $r0 -2: - ret - /* * Invalidate I$ */ diff --git a/arch/riscv/cpu/start.S b/arch/riscv/cpu/start.S index 88b4aaa1c0..9804a8ac44 100644 --- a/arch/riscv/cpu/start.S +++ b/arch/riscv/cpu/start.S @@ -50,14 +50,6 @@ handle_reset: csrwi mstatus, 0 csrwi mie, 0 -/* - * Do CPU critical regs init only at reboot, - * not when booting from ram - */ -#ifdef CONFIG_INIT_CRITICAL - jal cpu_init_crit /* Do CPU critical regs init */ -#endif - /* * Set stackpointer in internal/ex RAM to call board_init_f */ @@ -285,8 +277,3 @@ trap_entry: LREG x31, 31*REGBYTES(sp) addi sp, sp, 32*REGBYTES mret - -#ifdef CONFIG_INIT_CRITICAL -cpu_init_crit: - ret -#endif diff --git a/board/armltd/integrator/README b/board/armltd/integrator/README index 5a0e934924..af9dcc1f4f 100644 --- a/board/armltd/integrator/README +++ b/board/armltd/integrator/README @@ -36,9 +36,7 @@ In case c) it may be necessary for U-Boot to perform CM dependent initialization Configuring U-Boot : ------------------ The makefile contains targets for Integrator platforms of both types -fitted with all current variants of CM. If these targets are to be used with -boot process c) above then CONFIG_INIT_CRITICAL may need to be defined to ensure -that the CM is correctly configured. +fitted with all current variants of CM. There are also targets independent of CM. These may not be suitable for boot process c) above. They have been preserved for backward compatibility with diff --git a/include/common.h b/include/common.h index 8b9f859c07..9b9bedc53a 100644 --- a/include/common.h +++ b/include/common.h @@ -558,11 +558,6 @@ int cpu_release(u32 nr, int argc, char * const argv[]); #endif #endif -#ifdef CONFIG_INIT_CRITICAL -#error CONFIG_INIT_CRITICAL is deprecated! -#error Read section CONFIG_SKIP_LOWLEVEL_INIT in README. -#endif - #define ROUND(a,b) (((a) + (b) - 1) & ~((b) - 1)) /* diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt index 2126315460..933c9c5006 100644 --- a/scripts/config_whitelist.txt +++ b/scripts/config_whitelist.txt @@ -965,7 +965,6 @@ CONFIG_IMX_VIDEO_SKIP CONFIG_IMX_WATCHDOG CONFIG_INETSPACE_V2 CONFIG_INITRD_TAG -CONFIG_INIT_CRITICAL CONFIG_INIT_IGNORE_ERROR CONFIG_INI_ALLOW_MULTILINE CONFIG_INI_CASE_INSENSITIVE