From patchwork Fri Oct 19 22:07:26 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lukas Auer X-Patchwork-Id: 987074 X-Patchwork-Delegate: uboot@andestech.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=aisec.fraunhofer.de Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 42cL3K1c7tz9t0P for ; Sat, 20 Oct 2018 09:21:01 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id EB043C21C8B; Fri, 19 Oct 2018 22:13:32 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 54F34C21E0B; Fri, 19 Oct 2018 22:12:18 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id B7158C21E02; Fri, 19 Oct 2018 22:10:32 +0000 (UTC) Received: from mail-edgeS23.fraunhofer.de (mail-edges23.fraunhofer.de [153.97.7.23]) by lists.denx.de (Postfix) with ESMTPS id 45BA7C21E0B for ; Fri, 19 Oct 2018 22:10:29 +0000 (UTC) X-IronPort-Anti-Spam-Filtered: true X-IronPort-Anti-Spam-Result: A2EPAABKVcpb/xwBYJlkGgEBAQEBAgEBAQEHAgEBAQGBUwMBAQEBCwGCBIFTOoxsizuZHIF6DYRsAoUJITYLDQEDAQECAQECAgJpKIU8BnkQUT0aBg4FgyGCAQGof4oaCQGHIoQjgVg/gRABiF2FDQKIbZVUBwKBDYEBBI5PCxeBT4dcK4ZTllKBSg0lgVUzGiSDO4ImF44cbQGMJAEB X-IPAS-Result: A2EPAABKVcpb/xwBYJlkGgEBAQEBAgEBAQEHAgEBAQGBUwMBAQEBCwGCBIFTOoxsizuZHIF6DYRsAoUJITYLDQEDAQECAQECAgJpKIU8BnkQUT0aBg4FgyGCAQGof4oaCQGHIoQjgVg/gRABiF2FDQKIbZVUBwKBDYEBBI5PCxeBT4dcK4ZTllKBSg0lgVUzGiSDO4ImF44cbQGMJAEB X-IronPort-AV: E=Sophos;i="5.54,401,1534802400"; d="scan'208";a="6664203" Received: from mail-mtaka28.fraunhofer.de ([153.96.1.28]) by mail-edgeS23.fraunhofer.de with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 20 Oct 2018 00:10:29 +0200 X-IronPort-Anti-Spam-Filtered: true X-IronPort-Anti-Spam-Result: A0BPAAAiVcpb/xBhWMBkHAEBAQQBAQcEAQGBUwUBAQsBhBGMbKRXgXoNhGwChSk2Cw0BAwEBAgEBAm0ohTsGeRBRPRoGDgWDIYICqH+KGgkBhyKFez+BEAGIXYUNAohtlVQHAoENgQEEjk8LF4FPh1wrhlOWUoFKDSSBVTMaJIM7giYXjhw9MAGMJAEB X-IronPort-AV: E=Sophos;i="5.54,401,1534802400"; d="scan'208";a="18910104" Received: from fgdemucivp01ltm.xch.fraunhofer.de (HELO FGDEMUCIMP11EXC.ads.fraunhofer.de) ([192.88.97.16]) by mail-mtaKA28.fraunhofer.de with ESMTP/TLS/AES256-SHA; 20 Oct 2018 00:10:29 +0200 Received: from localhost.de (10.80.233.50) by FGDEMUCIMP11EXC.ads.fraunhofer.de (10.80.232.42) with Microsoft SMTP Server (TLS) id 14.3.408.0; Sat, 20 Oct 2018 00:11:47 +0200 From: Lukas Auer To: Date: Sat, 20 Oct 2018 00:07:26 +0200 Message-ID: <20181019220743.15020-14-lukas.auer@aisec.fraunhofer.de> X-Mailer: git-send-email 2.17.2 In-Reply-To: <20181019220743.15020-1-lukas.auer@aisec.fraunhofer.de> References: <20181019220743.15020-1-lukas.auer@aisec.fraunhofer.de> MIME-Version: 1.0 X-TM-AS-Product-Ver: SMEX-11.0.0.4179-8.200.1013-24166.002 X-TM-AS-Result: No--3.570300-8.000000-31 X-TM-AS-User-Approved-Sender: No X-TM-AS-User-Blocked-Sender: No Cc: Greentime Hu Subject: [U-Boot] [PATCH 13/30] riscv: do not reimplement generic io functions X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" RISC-V u-boot reimplements the generic io functions from asm-generic/io.h. Remove the redundant implementation and include the generic io.h instead. Signed-off-by: Lukas Auer Reviewed-by: Bin Meng Reviewed-by: Rick Chen --- arch/riscv/include/asm/io.h | 31 +++---------------------------- 1 file changed, 3 insertions(+), 28 deletions(-) diff --git a/arch/riscv/include/asm/io.h b/arch/riscv/include/asm/io.h index d01ed5bc9f..acf5a96449 100644 --- a/arch/riscv/include/asm/io.h +++ b/arch/riscv/include/asm/io.h @@ -17,16 +17,6 @@ static inline void sync(void) { } -/* - * Given a physical address and a length, return a virtual address - * that can be used to access the memory range with the caching - * properties specified by "flags". - */ -#define MAP_NOCACHE (0) -#define MAP_WRCOMBINE (0) -#define MAP_WRBACK (0) -#define MAP_WRTHROUGH (0) - #ifdef CONFIG_ARCH_MAP_SYSMEM static inline void *map_sysmem(phys_addr_t paddr, unsigned long len) { @@ -49,24 +39,6 @@ static inline phys_addr_t map_to_sysmem(const void *ptr) } #endif -static inline void * -map_physmem(phys_addr_t paddr, unsigned long len, unsigned long flags) -{ - return (void *)paddr; -} - -/* - * Take down a mapping set up by map_physmem(). - */ -static inline void unmap_physmem(void *vaddr, unsigned long flags) -{ -} - -static inline phys_addr_t virt_to_phys(void *vaddr) -{ - return (phys_addr_t)(vaddr); -} - /* * Generic virtual read/write. Note that we don't support half-word * read/writes. We define __arch_*[bl] here, and leave __arch_*w @@ -484,4 +456,7 @@ out: #endif /* __mem_isa */ #endif /* __KERNEL__ */ + +#include + #endif /* __ASM_RISCV_IO_H */