From patchwork Sat Sep 8 09:39:04 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Packham X-Patchwork-Id: 967590 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=gmail.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="JixzckMx"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 426q5p1bTYz9s1x for ; Sat, 8 Sep 2018 19:39:38 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 343A4C21E2C; Sat, 8 Sep 2018 09:39:29 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=-0.0 required=5.0 tests=FREEMAIL_FROM, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 798C8C21C3F; Sat, 8 Sep 2018 09:39:26 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id AAF22C21C3F; Sat, 8 Sep 2018 09:39:25 +0000 (UTC) Received: from mail-pg1-f195.google.com (mail-pg1-f195.google.com [209.85.215.195]) by lists.denx.de (Postfix) with ESMTPS id 12F5EC21C2F for ; Sat, 8 Sep 2018 09:39:25 +0000 (UTC) Received: by mail-pg1-f195.google.com with SMTP id l63-v6so8137992pga.7 for ; Sat, 08 Sep 2018 02:39:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=XvRluh3s8AuRypFU9l7EjMTaxdgKyeiAA/b/NWZw9TM=; b=JixzckMx69rrp48pMi+wxzaLGYBlBJ5nlAzFlwOq1RKbcCrwPhHVoxp1pp4JhGDA8M YRsylBIOwz7kUeHYectFfUHY7PMx4Ub8jIReQ4W3BPhSkX2CotT0tMsPS90B2J/obuD2 +Mp9G3eLmk9KGpNaRRsfHewS15QEO1peJ9eCi6aYRyw0FxKSd4gfw8Jf2Elrp95bAoiZ dK9O/rLgKRRcKuSqE2/dStQTmfzjN/rS+TbAEeZxjfyJWj3YcJREkrzBq4wQEMWmj5i+ lZQSoKx71ld2IG/XZn1gvbHoo5BR1BQ0iAiNhbKN5Y+smG9f3boYFaR0DPrOpE83OM3i rSHA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=XvRluh3s8AuRypFU9l7EjMTaxdgKyeiAA/b/NWZw9TM=; b=b9gr4jkst+J07IQyR5lqeUIahg1olngz2tbDpoVPtz0o8wnByn2UN8rqUgv1sFQ63t nptZKfSAGxX5dWXmJKdimQEsLfm/Vj7LSvSVX3R21vrjg6+L9H0bN/nAHRfvmCWZWYo8 49O8rcx7l5TwCLeycvwsmXmeWLV6zAAKNholkx7SqZ1hwGw164sjVIPCHsKBlQfdvJbU 5678WgFMhsAXffVUN2K/acAueg7VTkzjBDj0qpL/yeE435zjJpWAPPFpqR1jyyl1XrRp SRHIU0de/7gR0JdadWVH9eFa6ZRRCoeZrCP9i/0ep+P4DyQEqWzCItXgC5BG7fLyKAGr 5bRA== X-Gm-Message-State: APzg51D9CkNK13GCdBxO5m+hymXOgggPrajRo9Aeshi5be5Kk2ud4IVk zichASYT5dQcm8VHyXQpOTKvXM6DoQY= X-Google-Smtp-Source: ANB0VdbymJAuKfBavpa3FDAwkllR22Los4SVQBtJTS0zY1bUhsqiA2mjWTOo0IJp5gM8jOgBixwXjA== X-Received: by 2002:a63:28c7:: with SMTP id o190-v6mr12515872pgo.84.1536399563342; Sat, 08 Sep 2018 02:39:23 -0700 (PDT) Received: from chrisp-dl.ws.atlnz.lc ([2001:df5:b000:22:3a2c:4aff:fe70:2b02]) by smtp.gmail.com with ESMTPSA id b3-v6sm21072792pgm.74.2018.09.08.02.39.20 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sat, 08 Sep 2018 02:39:22 -0700 (PDT) From: Chris Packham To: u-boot@lists.denx.de Date: Sat, 8 Sep 2018 21:39:04 +1200 Message-Id: <20180908093907.11757-2-judge.packham@gmail.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20180908093907.11757-1-judge.packham@gmail.com> References: <20180908093907.11757-1-judge.packham@gmail.com> Cc: Stefan , Chris Packham Subject: [U-Boot] [PATCH 1/4] Add include/asm-generic/atomic.h X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" The arm, xtensa and mips version of atomic.h were already very similar (the mips one was a copy of xtensa). Combine these implementations together to produce a generic atomic.h that can be included by these architectures (and any others that need it in future). Signed-off-by: Chris Packham Reviewed-by: Tom Rini --- include/asm-generic/atomic.h | 150 +++++++++++++++++++++++++++++++++++ 1 file changed, 150 insertions(+) create mode 100644 include/asm-generic/atomic.h diff --git a/include/asm-generic/atomic.h b/include/asm-generic/atomic.h new file mode 100644 index 000000000000..94d0747194af --- /dev/null +++ b/include/asm-generic/atomic.h @@ -0,0 +1,150 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ + +#ifndef _ASM_GENERIC_ATOMIC_H +#define _ASM_GENERIC_ATOMIC_H + +typedef struct { volatile int counter; } atomic_t; +#if BITS_PER_LONG == 32 +typedef struct { volatile long long counter; } atomic64_t; +#else /* BIT_PER_LONG == 32 */ +typedef struct { volatile long counter; } atomic64_t; +#endif + +#define ATOMIC_INIT(i) { (i) } + +#define atomic_read(v) ((v)->counter) +#define atomic_set(v, i) ((v)->counter = (i)) +#define atomic64_read(v) atomic_read(v) +#define atomic64_set(v, i) atomic_set(v, i) + +static inline void atomic_add(int i, atomic_t *v) +{ + unsigned long flags = 0; + + local_irq_save(flags); + v->counter += i; + local_irq_restore(flags); +} + +static inline void atomic_sub(int i, atomic_t *v) +{ + unsigned long flags = 0; + + local_irq_save(flags); + v->counter -= i; + local_irq_restore(flags); +} + +static inline void atomic_inc(atomic_t *v) +{ + unsigned long flags = 0; + + local_irq_save(flags); + ++v->counter; + local_irq_restore(flags); +} + +static inline void atomic_dec(atomic_t *v) +{ + unsigned long flags = 0; + + local_irq_save(flags); + --v->counter; + local_irq_restore(flags); +} + +static inline int atomic_dec_and_test(volatile atomic_t *v) +{ + unsigned long flags = 0; + int val; + + local_irq_save(flags); + val = v->counter; + v->counter = val -= 1; + local_irq_restore(flags); + + return val == 0; +} + +static inline int atomic_add_negative(int i, volatile atomic_t *v) +{ + unsigned long flags = 0; + int val; + + local_irq_save(flags); + val = v->counter; + v->counter = val += i; + local_irq_restore(flags); + + return val < 0; +} + +static inline void atomic_clear_mask(unsigned long mask, unsigned long *addr) +{ + unsigned long flags = 0; + + local_irq_save(flags); + *addr &= ~mask; + local_irq_restore(flags); +} + +#if BITS_PER_LONG == 32 + +static inline void atomic64_add(long long i, volatile atomic64_t *v) +{ + unsigned long flags = 0; + + local_irq_save(flags); + v->counter += i; + local_irq_restore(flags); +} + +static inline void atomic64_sub(long long i, volatile atomic64_t *v) +{ + unsigned long flags = 0; + + local_irq_save(flags); + v->counter -= i; + local_irq_restore(flags); +} + +#else /* BIT_PER_LONG == 32 */ + +static inline void atomic64_add(long i, volatile atomic64_t *v) +{ + unsigned long flags = 0; + + local_irq_save(flags); + v->counter += i; + local_irq_restore(flags); +} + +static inline void atomic64_sub(long i, volatile atomic64_t *v) +{ + unsigned long flags = 0; + + local_irq_save(flags); + v->counter -= i; + local_irq_restore(flags); +} +#endif + +static inline void atomic64_inc(volatile atomic64_t *v) +{ + unsigned long flags = 0; + + local_irq_save(flags); + v->counter += 1; + local_irq_restore(flags); +} + +static inline void atomic64_dec(volatile atomic64_t *v) +{ + unsigned long flags = 0; + + local_irq_save(flags); + v->counter -= 1; + local_irq_restore(flags); +} + +#endif