From patchwork Thu Sep 6 07:51:53 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?S=C3=A9bastien_Szymanski?= X-Patchwork-Id: 966839 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=armadeus.com Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 425XXt4SvGz9s3Z for ; Thu, 6 Sep 2018 17:40:14 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 5D6C9C21DD9; Thu, 6 Sep 2018 07:40:09 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id C1566C21C27; Thu, 6 Sep 2018 07:40:06 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 60D8FC21C27; Thu, 6 Sep 2018 07:40:05 +0000 (UTC) Received: from 12.mo5.mail-out.ovh.net (12.mo5.mail-out.ovh.net [46.105.39.65]) by lists.denx.de (Postfix) with ESMTPS id 0C42BC21BE5 for ; Thu, 6 Sep 2018 07:40:05 +0000 (UTC) Received: from player687.ha.ovh.net (unknown [10.109.143.223]) by mo5.mail-out.ovh.net (Postfix) with ESMTP id CDDA51E7CEF for ; Thu, 6 Sep 2018 09:40:03 +0200 (CEST) Received: from localhost.localdomain (22.220.201.77.rev.sfr.net [77.201.220.22]) (Authenticated sender: sebastien.szymanski@armadeus.com) by player687.ha.ovh.net (Postfix) with ESMTPSA id 3C2772C00BE; Thu, 6 Sep 2018 09:39:58 +0200 (CEST) From: =?utf-8?q?S=C3=A9bastien_Szymanski?= To: u-boot@lists.denx.de Date: Thu, 6 Sep 2018 09:51:53 +0200 Message-Id: <20180906075153.7665-1-sebastien.szymanski@armadeus.com> X-Mailer: git-send-email 2.16.4 MIME-Version: 1.0 X-Ovh-Tracer-Id: 15695889128861422617 X-VR-SPAMSTATE: OK X-VR-SPAMSCORE: -100 X-VR-SPAMCAUSE: gggruggvucftvghtrhhoucdtuddrgedtjedriedugdduvdefucetufdoteggodetrfdotffvucfrrhhofhhilhgvmecuqfggjfdpvefjgfevmfevgfenuceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddm Cc: Fabio Estevam , Tom Rini Subject: [U-Boot] [PATCH v3 1/1] ARM: opos6ul: make the board boot again X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Commit 9faa43c4b5e5 ("ARM: dts: i.MX6UL: U-Boot specific dts for u-boot, dm-spl") removes the u-boot,dm-spl properties from the imx6ul.dtsi file and breaks the OPOS6UL board. Add the u-boot,dm-spl properties into *-u-boot.dts files to make the board boot again. Fixes: commit 9faa43c4b5e5 ("ARM: dts: i.MX6UL: U-Boot specific dts for u-boot, dm-spl") Signed-off-by: Sébastien Szymanski Reviewed-by: Tom Rini Reviewed-by: Stefano Babic --- Changes for v3: - use the automatic inclusion of -u-boot.dtsi mechanism of U-Boot. Changes for v2: - put u-boot,dm-spl properties into -u-boot.dts files arch/arm/dts/imx6ul-opos6ul-u-boot.dtsi | 28 ++++++++++++++++++++++++++++ arch/arm/dts/imx6ul-opos6ul.dtsi | 2 -- arch/arm/dts/imx6ul-opos6uldev-u-boot.dtsi | 24 ++++++++++++++++++++++++ arch/arm/dts/imx6ul-opos6uldev.dts | 2 -- 4 files changed, 52 insertions(+), 4 deletions(-) create mode 100644 arch/arm/dts/imx6ul-opos6ul-u-boot.dtsi create mode 100644 arch/arm/dts/imx6ul-opos6uldev-u-boot.dtsi diff --git a/arch/arm/dts/imx6ul-opos6ul-u-boot.dtsi b/arch/arm/dts/imx6ul-opos6ul-u-boot.dtsi new file mode 100644 index 0000000000..4918de388e --- /dev/null +++ b/arch/arm/dts/imx6ul-opos6ul-u-boot.dtsi @@ -0,0 +1,28 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Device Tree Source extras for U-Boot for the OPOS6UL SoM + * + * Copyright (C) 2018 Armadeus Systems + */ + +/ { + soc { + u-boot,dm-spl; + }; +}; + +&aips2 { + u-boot,dm-spl; +}; + +&iomuxc { + u-boot,dm-spl; +}; + +&pinctrl_usdhc1 { + u-boot,dm-spl; +}; + +&usdhc1 { + u-boot,dm-spl; +}; diff --git a/arch/arm/dts/imx6ul-opos6ul.dtsi b/arch/arm/dts/imx6ul-opos6ul.dtsi index d51ad4de20..8f16a0a81c 100644 --- a/arch/arm/dts/imx6ul-opos6ul.dtsi +++ b/arch/arm/dts/imx6ul-opos6ul.dtsi @@ -99,7 +99,6 @@ /* eMMC */ &usdhc1 { - u-boot,dm-spl; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usdhc1>; bus-width = <8>; @@ -162,7 +161,6 @@ }; pinctrl_usdhc1: usdhc1grp { - u-boot,dm-spl; fsl,pins = < MX6UL_PAD_SD1_CMD__USDHC1_CMD 0x17059 MX6UL_PAD_SD1_CLK__USDHC1_CLK 0x10059 diff --git a/arch/arm/dts/imx6ul-opos6uldev-u-boot.dtsi b/arch/arm/dts/imx6ul-opos6uldev-u-boot.dtsi new file mode 100644 index 0000000000..da8b0392ef --- /dev/null +++ b/arch/arm/dts/imx6ul-opos6uldev-u-boot.dtsi @@ -0,0 +1,24 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Device Tree Source extras for U-Boot for the OPOS6ULDev board + * + * Copyright (C) 2018 Armadeus Systems + */ + +#include "imx6ul-opos6ul-u-boot.dtsi" + +&aips1 { + u-boot,dm-spl; + + spba-bus@02000000 { + u-boot,dm-spl; + }; +}; + +&pinctrl_uart1 { + u-boot,dm-spl; +}; + +&uart1 { + u-boot,dm-spl; +}; diff --git a/arch/arm/dts/imx6ul-opos6uldev.dts b/arch/arm/dts/imx6ul-opos6uldev.dts index 9a51d1e54f..0e59ee57fd 100644 --- a/arch/arm/dts/imx6ul-opos6uldev.dts +++ b/arch/arm/dts/imx6ul-opos6uldev.dts @@ -228,7 +228,6 @@ }; &uart1 { - u-boot,dm-spl; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_uart1>; status = "okay"; @@ -374,7 +373,6 @@ }; pinctrl_uart1: uart1grp { - u-boot,dm-spl; fsl,pins = < MX6UL_PAD_UART1_TX_DATA__UART1_DCE_TX 0x1b0b1 MX6UL_PAD_UART1_RX_DATA__UART1_DCE_RX 0x1b0b1