From patchwork Wed Sep 5 10:56:05 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan O'Donoghue X-Patchwork-Id: 966312 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.b="PhY5f2eP"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 4250yM2FjZz9s3Z for ; Wed, 5 Sep 2018 20:56:59 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 10B18C21D74; Wed, 5 Sep 2018 10:56:35 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=RCVD_IN_MSPIKE_H2, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id E5FE3C21DA2; Wed, 5 Sep 2018 10:56:14 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 2575DC21C29; Wed, 5 Sep 2018 10:56:13 +0000 (UTC) Received: from mail-ed1-f68.google.com (mail-ed1-f68.google.com [209.85.208.68]) by lists.denx.de (Postfix) with ESMTPS id 79877C21BE5 for ; Wed, 5 Sep 2018 10:56:12 +0000 (UTC) Received: by mail-ed1-f68.google.com with SMTP id j62-v6so5710341edd.7 for ; Wed, 05 Sep 2018 03:56:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=ePQ9pBdm8Snq1VjhqMIHxWFnxREGj3sMvEAYEz+J18I=; b=PhY5f2eP2o1ynomAnin5Pd69e2JiRX+XbskXK7LqEe4I0cXfelRy/v6CT6kQcNESz7 D2WfTrzZlag8Bs3qqVcL/h36TlYP+fqyieyYuBpxmDIzeNNQQfOzVga7mZIQjataz7uE bOaGbN0P85xYzYiNwY7dLi5oQBbcYnMB2TD/c= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=ePQ9pBdm8Snq1VjhqMIHxWFnxREGj3sMvEAYEz+J18I=; b=R8SWx6LOwJpRJ8C+hLSdDRDXZ8UKOBMI4zlW+TYVvGRndQaNShz1ixzjQsMdTyftxv aL8LNXKePnVngEwWeE6SLtF8ZXnUsAWuUlBexBUcB16y0nSxvOG5AnoubHNIkXQwMaxd o4ayBLzPbD+wmSoatQb7NeZK2rVzrrZXLKNx74FZeyBDhs1BKtu9wN5AMU7QE7x0Elaq hfObD9XuL3OFSwwIloFUYuQzH1HX/7SJL7oe9+mfO2bSdDN/k+XMRT56WLIvYlasLOsC BLrbnzwuH1CFkrnD/yKFKKZmK1zVSo40awpEdSXPEFoHcLCKsy/mWxZoE+QSzXb/KJAY LQFA== X-Gm-Message-State: APzg51A+Zr+as0ivoVw+3A3C0pSaKojayNgG69PxtPyfTbhJ1+eiYhva r2YUmkwnR0T44xxYH7cvBMCRRvvQH0o= X-Google-Smtp-Source: ANB0VdaTJikPbz4S5Cp6BvUpArVdHXW76qotYQJZalO8Z8hYFRH19XoinmfxhP/uEYVTSwciykzEHQ== X-Received: by 2002:a50:d75d:: with SMTP id i29-v6mr29639802edj.17.1536144971931; Wed, 05 Sep 2018 03:56:11 -0700 (PDT) Received: from event-horizon.net ([80.111.179.123]) by smtp.gmail.com with ESMTPSA id h34-v6sm1052235eda.58.2018.09.05.03.56.10 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 05 Sep 2018 03:56:11 -0700 (PDT) From: Bryan O'Donoghue To: u-boot@lists.denx.de, fabio.estevam@nxp.com Date: Wed, 5 Sep 2018 11:56:05 +0100 Message-Id: <20180905105608.453-2-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20180905105608.453-1-bryan.odonoghue@linaro.org> References: <20180905105608.453-1-bryan.odonoghue@linaro.org> Cc: Rui Miguel Silva Subject: [U-Boot] [PATCH 1/4] imx: mx7: avoid some initialization if low level is skipped X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Rui Miguel Silva We can have the case where u-boot is launched after some other low level enabler, like for example when u-boot runs after arm-trusted-firmware and/or optee. So, because of that we may need to jump the initialization of some IP blocks even because we may no longer have the permission for that. So, if the config option to skip low level init is set disable also timer, board and csu initialization. Signed-off-by: Rui Miguel Silva Signed-off-by: Bryan O'Donoghue Cc: Stefano Babic Cc: Fabio Estevam Cc: Albert Aribaud Cc: Peng Fan Cc: u-boot@lists.denx.de Reviewed-by: Peng Fan --- arch/arm/mach-imx/mx7/soc.c | 2 ++ arch/arm/mach-imx/syscounter.c | 2 ++ 2 files changed, 4 insertions(+) diff --git a/arch/arm/mach-imx/mx7/soc.c b/arch/arm/mach-imx/mx7/soc.c index 7334ca9eb8..c38bd1ce46 100644 --- a/arch/arm/mach-imx/mx7/soc.c +++ b/arch/arm/mach-imx/mx7/soc.c @@ -133,6 +133,7 @@ u32 __weak get_board_rev(void) } #endif +#ifndef CONFIG_SKIP_LOWLEVEL_INIT /* enable all periherial can be accessed in nosec mode */ static void init_csu(void) { @@ -182,6 +183,7 @@ int arch_cpu_init(void) return 0; } +#endif #ifdef CONFIG_ARCH_MISC_INIT int arch_misc_init(void) diff --git a/arch/arm/mach-imx/syscounter.c b/arch/arm/mach-imx/syscounter.c index 676bb3caa9..2c319681fc 100644 --- a/arch/arm/mach-imx/syscounter.c +++ b/arch/arm/mach-imx/syscounter.c @@ -55,6 +55,7 @@ static inline unsigned long long us_to_tick(unsigned long long usec) return usec; } +#ifndef CONFIG_SKIP_LOWLEVEL_INIT int timer_init(void) { struct sctr_regs *sctr = (struct sctr_regs *)SCTR_BASE_ADDR; @@ -76,6 +77,7 @@ int timer_init(void) return 0; } +#endif unsigned long long get_ticks(void) {