From patchwork Tue Apr 24 17:46:31 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan O'Donoghue X-Patchwork-Id: 903740 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=linaro.org Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.b="hiPBOmwJ"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 40VrcG3l9fz9s0v for ; Wed, 25 Apr 2018 03:56:30 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 39342C21F78; Tue, 24 Apr 2018 17:54:42 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=-0.0 required=5.0 tests=RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id C6B02C21FC5; Tue, 24 Apr 2018 17:47:58 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 2D001C21F34; Tue, 24 Apr 2018 17:46:54 +0000 (UTC) Received: from mail-wm0-f65.google.com (mail-wm0-f65.google.com [74.125.82.65]) by lists.denx.de (Postfix) with ESMTPS id 70AE2C21F67 for ; Tue, 24 Apr 2018 17:46:54 +0000 (UTC) Received: by mail-wm0-f65.google.com with SMTP id x12so1483186wmc.0 for ; Tue, 24 Apr 2018 10:46:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=yKOyqblyyirFTXF+rpUNwHLLitVBnQ8VEVBPJAYeEJQ=; b=hiPBOmwJjBEqOtvy5FJ3CNyyNbpTgyh7UtTNpeaK8iYP3yBX3iIlD+jO+gar5PXeCB 5dQBzLlgIKamyXakaTsuDmADtKS0lpe0kpT7L5gWGApYt9n9CEiwULKBYQ22vL3ybW+o eyjeb7JqR6BQsjbXExPIpTXqnEEHQCKRKFhI0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=yKOyqblyyirFTXF+rpUNwHLLitVBnQ8VEVBPJAYeEJQ=; b=fbNmdIl7558T+AApg0uHZmj25oVlvya8EOkJfGuDc6BgKEZnLynRlHnz/3RK4Us+Be fX79bEBVKcJFKCo69YASHWCAHo6UmPv/E1C8KXVsZG/NQypxWTOE5QHjpTTsSoehV7+v wybDUXf+LKXXHFXL7TLQSxcbNlm80Fn5aHXBcFnlhxPjz/y+wr8XLYzeu5Qmv4UaEgOf ShuVmKS7rzTO2QgeV1qOZ2Wl0gdw/jft2f4GYsWe9qnYsMpRyRwnLQD3HNzY1zv2YKG6 AA3O8R4J2ADjwZgpEYCaa01cZ+RNfVAtHdw/RCV3Ox4HNBZCvU4Fb/Uc07234EoZo4Ua NVNQ== X-Gm-Message-State: ALQs6tBix18hyzyVsbO42YJdFMewb7YcKgeAf/Py7fGwLEsbkL1dwjyo uDTLhNKFZ2bhKaGkChKVXNvacZ+W5YI= X-Google-Smtp-Source: AIpwx4/H7A9Q81JRV2c32ah7RdO0h9r1F3Z/xG7vqMLx/ef50f65l0H9XcKa19c7zGIHJ0bZLRIdIg== X-Received: by 10.80.131.67 with SMTP id 61mr31340623edh.48.1524592013927; Tue, 24 Apr 2018 10:46:53 -0700 (PDT) Received: from event-horizon.net ([109.255.42.2]) by smtp.gmail.com with ESMTPSA id e6sm6443087eds.20.2018.04.24.10.46.52 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 24 Apr 2018 10:46:53 -0700 (PDT) From: Bryan O'Donoghue To: u-boot@lists.denx.de, sbabic@denx.de, fabio.estevam@nxp.com, breno.lima@nxp.com Date: Tue, 24 Apr 2018 18:46:31 +0100 Message-Id: <20180424174647.11840-3-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180424174647.11840-1-bryan.odonoghue@linaro.org> References: <20180424174647.11840-1-bryan.odonoghue@linaro.org> Cc: Utkarsh Gupta Subject: [U-Boot] [PATCH v4 02/18] imximage: Specify default IVT offset in IMX image X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" This patch adds BOOTROM_IVT_HDR_OFFSET at 0xC00. The BootROM expects to find the IVT header at a particular offset in an i.MX image. Defining the expected offset of the IVT header in the first-stage BootROM image format is of use of later stage authentication routines where those routines continue to follow the first-stage authentication layout. This patch defines the first stage offset which later patch make use of. Signed-off-by: Bryan O'Donoghue Cc: Utkarsh Gupta Cc: Breno Lima Cc: Fabio Estevam Tested-by: Breno Lima Reviewed-by: Fabio Estevam --- include/imximage.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/include/imximage.h b/include/imximage.h index 553b852367..800fd6383b 100644 --- a/include/imximage.h +++ b/include/imximage.h @@ -14,6 +14,9 @@ #define APP_CODE_BARKER 0xB1 #define DCD_BARKER 0xB17219E9 +/* Specify the offset of the IVT in the IMX header as expected by BootROM */ +#define BOOTROM_IVT_HDR_OFFSET 0xC00 + /* * NOTE: This file must be kept in sync with arch/arm/include/asm/\ * mach-imx/imximage.cfg because tools/imximage.c can not