Message ID | 20170922072635.32105-7-wens@csie.org |
---|---|
State | Changes Requested |
Delegated to: | Jagannadha Sutradharudu Teki |
Headers | show |
Series | sunxi: A83T improvements | expand |
On Fri, Sep 22, 2017 at 07:26:32AM +0000, Chen-Yu Tsai wrote: > The EMAC syscon has configurable RX/TX delay chains for use with RGMII > PHYs. > > This adds support for configuring them via device tree properties. The > property names and format were defined in Linux's dwmac-sun8i binding > that was merged at one point. > > Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Maxime
On Fri, Sep 22, 2017 at 2:26 AM, Chen-Yu Tsai <wens@csie.org> wrote: > The EMAC syscon has configurable RX/TX delay chains for use with RGMII > PHYs. > > This adds support for configuring them via device tree properties. The > property names and format were defined in Linux's dwmac-sun8i binding > that was merged at one point. > > Signed-off-by: Chen-Yu Tsai <wens@csie.org> > --- > drivers/net/sun8i_emac.c | 25 +++++++++++++++++++++++++ > 1 file changed, 25 insertions(+) > > diff --git a/drivers/net/sun8i_emac.c b/drivers/net/sun8i_emac.c > index 09bbb2cdb5ca..5fa1b4c170d7 100644 > --- a/drivers/net/sun8i_emac.c > +++ b/drivers/net/sun8i_emac.c > @@ -56,6 +56,10 @@ > #define H3_EPHY_SELECT BIT(15) /* 1: internal PHY, 0: external PHY */ > > #define SC_RMII_EN BIT(13) > +#define SC_TXDC_SHIFT 10 > +#define SC_TXDC_MASK GENMASK(2, 0) > +#define SC_RXDC_SHIFT 5 > +#define SC_RXDC_MASK GENMASK(4, 0) > #define SC_EPIT BIT(2) /* 1: RGMII, 0: MII */ > #define SC_ETCS_MASK GENMASK(1, 0) > #define SC_ETCS_EXT_GMII 0x1 > @@ -125,6 +129,8 @@ struct emac_eth_dev { > u32 addr; > u32 tx_slot; > bool use_internal_phy; > + u32 tx_delay; > + u32 rx_delay; > > enum emac_variant variant; > void *mac_reg; > @@ -290,6 +296,12 @@ static int sun8i_emac_set_syscon(struct emac_eth_dev *priv) > if (priv->variant == H3_EMAC || priv->variant == A64_EMAC) > reg &= ~SC_RMII_EN; > > + /* Configure RX/TX delay chains */ > + reg &= ~(SC_RXDC_MASK << SC_RXDC_SHIFT); > + reg &= ~(SC_TXDC_MASK << SC_TXDC_SHIFT); > + reg |= (priv->rx_delay & SC_RXDC_MASK) << SC_RXDC_SHIFT; > + reg |= (priv->tx_delay & SC_TXDC_MASK) << SC_TXDC_SHIFT; Why not use bitfield_replace_by_mask() from include/bitfield.h? > + > switch (priv->interface) { > case PHY_INTERFACE_MODE_MII: > /* default */ > @@ -836,6 +848,19 @@ static int sun8i_emac_eth_ofdata_to_platdata(struct udevice *dev) > } > #endif > > + /* Get RX/TX delays for RGMII */ > + priv->rx_delay = fdtdec_get_uint(gd->fdt_blob, dev_of_offset(dev), > + "allwinner,rx-delay-ps", 0); > + if (priv->rx_delay % 100 || priv->rx_delay > 3100) > + debug("%s: invalid rx delay value\n", __func__); > + priv->rx_delay /= 100; > + > + priv->tx_delay = fdtdec_get_uint(gd->fdt_blob, dev_of_offset(dev), > + "allwinner,tx-delay-ps", 0); > + if (priv->tx_delay % 100 || priv->tx_delay > 800) > + debug("%s: invalid tx delay value\n", __func__); > + priv->tx_delay /= 100; > + > return 0; > } > > -- > 2.14.1 > > _______________________________________________ > U-Boot mailing list > U-Boot@lists.denx.de > https://lists.denx.de/listinfo/u-boot
On Wed, Sep 27, 2017 at 11:53 PM, Joe Hershberger <joe.hershberger@ni.com> wrote: > On Fri, Sep 22, 2017 at 2:26 AM, Chen-Yu Tsai <wens@csie.org> wrote: >> The EMAC syscon has configurable RX/TX delay chains for use with RGMII >> PHYs. >> >> This adds support for configuring them via device tree properties. The >> property names and format were defined in Linux's dwmac-sun8i binding >> that was merged at one point. >> >> Signed-off-by: Chen-Yu Tsai <wens@csie.org> >> --- >> drivers/net/sun8i_emac.c | 25 +++++++++++++++++++++++++ >> 1 file changed, 25 insertions(+) >> >> diff --git a/drivers/net/sun8i_emac.c b/drivers/net/sun8i_emac.c >> index 09bbb2cdb5ca..5fa1b4c170d7 100644 >> --- a/drivers/net/sun8i_emac.c >> +++ b/drivers/net/sun8i_emac.c >> @@ -56,6 +56,10 @@ >> #define H3_EPHY_SELECT BIT(15) /* 1: internal PHY, 0: external PHY */ >> >> #define SC_RMII_EN BIT(13) >> +#define SC_TXDC_SHIFT 10 >> +#define SC_TXDC_MASK GENMASK(2, 0) >> +#define SC_RXDC_SHIFT 5 >> +#define SC_RXDC_MASK GENMASK(4, 0) >> #define SC_EPIT BIT(2) /* 1: RGMII, 0: MII */ >> #define SC_ETCS_MASK GENMASK(1, 0) >> #define SC_ETCS_EXT_GMII 0x1 >> @@ -125,6 +129,8 @@ struct emac_eth_dev { >> u32 addr; >> u32 tx_slot; >> bool use_internal_phy; >> + u32 tx_delay; >> + u32 rx_delay; >> >> enum emac_variant variant; >> void *mac_reg; >> @@ -290,6 +296,12 @@ static int sun8i_emac_set_syscon(struct emac_eth_dev *priv) >> if (priv->variant == H3_EMAC || priv->variant == A64_EMAC) >> reg &= ~SC_RMII_EN; >> >> + /* Configure RX/TX delay chains */ >> + reg &= ~(SC_RXDC_MASK << SC_RXDC_SHIFT); >> + reg &= ~(SC_TXDC_MASK << SC_TXDC_SHIFT); >> + reg |= (priv->rx_delay & SC_RXDC_MASK) << SC_RXDC_SHIFT; >> + reg |= (priv->tx_delay & SC_TXDC_MASK) << SC_TXDC_SHIFT; > > Why not use bitfield_replace_by_mask() from include/bitfield.h? Because I wasn't aware of such helpers. If that's preferred I'll respin the patch. ChenYu >> + >> switch (priv->interface) { >> case PHY_INTERFACE_MODE_MII: >> /* default */ >> @@ -836,6 +848,19 @@ static int sun8i_emac_eth_ofdata_to_platdata(struct udevice *dev) >> } >> #endif >> >> + /* Get RX/TX delays for RGMII */ >> + priv->rx_delay = fdtdec_get_uint(gd->fdt_blob, dev_of_offset(dev), >> + "allwinner,rx-delay-ps", 0); >> + if (priv->rx_delay % 100 || priv->rx_delay > 3100) >> + debug("%s: invalid rx delay value\n", __func__); >> + priv->rx_delay /= 100; >> + >> + priv->tx_delay = fdtdec_get_uint(gd->fdt_blob, dev_of_offset(dev), >> + "allwinner,tx-delay-ps", 0); >> + if (priv->tx_delay % 100 || priv->tx_delay > 800) >> + debug("%s: invalid tx delay value\n", __func__); >> + priv->tx_delay /= 100; >> + >> return 0; >> } >> >> -- >> 2.14.1 >> >> _______________________________________________ >> U-Boot mailing list >> U-Boot@lists.denx.de >> https://lists.denx.de/listinfo/u-boot
diff --git a/drivers/net/sun8i_emac.c b/drivers/net/sun8i_emac.c index 09bbb2cdb5ca..5fa1b4c170d7 100644 --- a/drivers/net/sun8i_emac.c +++ b/drivers/net/sun8i_emac.c @@ -56,6 +56,10 @@ #define H3_EPHY_SELECT BIT(15) /* 1: internal PHY, 0: external PHY */ #define SC_RMII_EN BIT(13) +#define SC_TXDC_SHIFT 10 +#define SC_TXDC_MASK GENMASK(2, 0) +#define SC_RXDC_SHIFT 5 +#define SC_RXDC_MASK GENMASK(4, 0) #define SC_EPIT BIT(2) /* 1: RGMII, 0: MII */ #define SC_ETCS_MASK GENMASK(1, 0) #define SC_ETCS_EXT_GMII 0x1 @@ -125,6 +129,8 @@ struct emac_eth_dev { u32 addr; u32 tx_slot; bool use_internal_phy; + u32 tx_delay; + u32 rx_delay; enum emac_variant variant; void *mac_reg; @@ -290,6 +296,12 @@ static int sun8i_emac_set_syscon(struct emac_eth_dev *priv) if (priv->variant == H3_EMAC || priv->variant == A64_EMAC) reg &= ~SC_RMII_EN; + /* Configure RX/TX delay chains */ + reg &= ~(SC_RXDC_MASK << SC_RXDC_SHIFT); + reg &= ~(SC_TXDC_MASK << SC_TXDC_SHIFT); + reg |= (priv->rx_delay & SC_RXDC_MASK) << SC_RXDC_SHIFT; + reg |= (priv->tx_delay & SC_TXDC_MASK) << SC_TXDC_SHIFT; + switch (priv->interface) { case PHY_INTERFACE_MODE_MII: /* default */ @@ -836,6 +848,19 @@ static int sun8i_emac_eth_ofdata_to_platdata(struct udevice *dev) } #endif + /* Get RX/TX delays for RGMII */ + priv->rx_delay = fdtdec_get_uint(gd->fdt_blob, dev_of_offset(dev), + "allwinner,rx-delay-ps", 0); + if (priv->rx_delay % 100 || priv->rx_delay > 3100) + debug("%s: invalid rx delay value\n", __func__); + priv->rx_delay /= 100; + + priv->tx_delay = fdtdec_get_uint(gd->fdt_blob, dev_of_offset(dev), + "allwinner,tx-delay-ps", 0); + if (priv->tx_delay % 100 || priv->tx_delay > 800) + debug("%s: invalid tx delay value\n", __func__); + priv->tx_delay /= 100; + return 0; }
The EMAC syscon has configurable RX/TX delay chains for use with RGMII PHYs. This adds support for configuring them via device tree properties. The property names and format were defined in Linux's dwmac-sun8i binding that was merged at one point. Signed-off-by: Chen-Yu Tsai <wens@csie.org> --- drivers/net/sun8i_emac.c | 25 +++++++++++++++++++++++++ 1 file changed, 25 insertions(+)