From patchwork Mon Sep 4 05:38:31 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Packham X-Patchwork-Id: 809516 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="HqESrHT0"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 3xlzDV4ngMz9s78 for ; Mon, 4 Sep 2017 15:39:06 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 46D08C21DC5; Mon, 4 Sep 2017 05:38:59 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=-0.0 required=5.0 tests=FREEMAIL_FROM, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id A4907C21DAD; Mon, 4 Sep 2017 05:38:57 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 0D381C21DAD; Mon, 4 Sep 2017 05:38:56 +0000 (UTC) Received: from mail-pg0-f68.google.com (mail-pg0-f68.google.com [74.125.83.68]) by lists.denx.de (Postfix) with ESMTPS id 639E2C21D7D for ; Mon, 4 Sep 2017 05:38:55 +0000 (UTC) Received: by mail-pg0-f68.google.com with SMTP id t193so3781226pgc.4 for ; Sun, 03 Sep 2017 22:38:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id; bh=5mgOuVBcVMoxfQ8Bhi2awryzH6cIME+T+ZSr1B8IvrM=; b=HqESrHT0tRTeQZi/fY8bq57nOvr/afhU2GbPGF3prCJsIa2/MGOmKyMtMKMOprhufq xUIgGcKcNzV0NcVaACbYVJipvojIHmqeB8gtLKLw/fxZrfADJreJONuMuvqjQLcY5Gzj cwHQg2G3tUTo7J9lO5Sr+DQI3wxt9GmxqGfKiG0Pp1dgPRBp0DQt9lrIcZohlTwPzRoy nJrmqxXS9Ya05U4Cvi8HJ/C2VJqQPHhgt5dY9WiIV2pDkypeWMPmZVG0ZPaaenR24mSt rwtoQCd6PD29nqCbxZqiWkcYScm955Nu5zYCEuqzx3IghlKI0fLtuEX+8epCHWC7NA3q qs9Q== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=5mgOuVBcVMoxfQ8Bhi2awryzH6cIME+T+ZSr1B8IvrM=; b=mPywbhnAl3QbOmGleQiYLf5uslmGJy/+8h+SR8WAVl/1KqXYeyoj++q4FGOUqPcJqf h06kxo7Y2xXVhzc4l9ccfwO3bAaJ7tLrmhl8WGJ/HekeBk8xrcZNmxyXTHhhePSqu3Yl NOfWbHIF/gIMvPAeQJXVwvKMAjf1LJZ7l0ec7+LgMlQBrxl7No33l9He5Kk41mWV9te5 2FrZZrXatcwvLGrTx78BzgImWAs7C7joMY7s5/gWtxxB0pPOj/i6MR6F3u+UKeQC7ORB eD+tM4WPYRXtG9pVxTWCwZW2YFZjbXz1mzW5ZPqDA5XlDcv6n+fy52JdUiWJ403cQpDI ls9w== X-Gm-Message-State: AHPjjUhQ4q559YNPbi/oBzsGBSmUPQ/JqZxbiB43kxP7ZKyRZKCyrKx9 mrI92tIguPV1Qq4yKcw= X-Google-Smtp-Source: ADKCNb4R6s4UfZ/wbGwoLfhC6qk3HW+xC5aLdwDlubLU6EGrukJNhe2pkl3C483mKB6V6NAAs/lLdA== X-Received: by 10.84.194.228 with SMTP id h91mr10986151pld.397.1504503533615; Sun, 03 Sep 2017 22:38:53 -0700 (PDT) Received: from chrisp-dl.ws.atlnz.lc ([2001:df5:b000:22:3a2c:4aff:fe70:2b02]) by smtp.gmail.com with ESMTPSA id j187sm8789776pgc.10.2017.09.03.22.38.48 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 03 Sep 2017 22:38:52 -0700 (PDT) From: Chris Packham To: u-boot@lists.denx.de Date: Mon, 4 Sep 2017 17:38:31 +1200 Message-Id: <20170904053832.12229-1-judge.packham@gmail.com> X-Mailer: git-send-email 2.14.1 Cc: Luka Perkov , Stefan Roese , Chris Packham Subject: [U-Boot] [next PATCH v2 1/2] ARM: mvebu: Add SoC IDs for Marvell's integrated CPUs X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" These SoCs are network packet processors (switch chips) with integrated ARMv7 cores. They share a great deal of commonality with the Armada-XP CPUs. Signed-off-by: Chris Packham Reviewed-by: Stefan Roese --- There are actually a number of IDs for these chips, probably a dozen in total. I haven't enumerated them all in this patch, the 98DX4251, 98DX3336 and 98DX3236 are the base versions in their respective ranges. These 3 IDs also happen to suit my immediate need but I can add the additional ones in an follow up patch or a re-roll of this one. Changes in v2: - none arch/arm/mach-mvebu/cpu.c | 14 ++++++++++++++ arch/arm/mach-mvebu/include/mach/cpu.h | 1 + arch/arm/mach-mvebu/include/mach/soc.h | 3 +++ 3 files changed, 18 insertions(+) diff --git a/arch/arm/mach-mvebu/cpu.c b/arch/arm/mach-mvebu/cpu.c index 14457317ce76..f7f83bfa3655 100644 --- a/arch/arm/mach-mvebu/cpu.c +++ b/arch/arm/mach-mvebu/cpu.c @@ -62,6 +62,11 @@ int mvebu_soc_family(void) case SOC_88F6820_ID: case SOC_88F6828_ID: return MVEBU_SOC_A38X; + + case SOC_98DX3236_ID: + case SOC_98DX3336_ID: + case SOC_98DX4251_ID: + return MVEBU_SOC_MSYS; } return MVEBU_SOC_UNKNOWN; @@ -208,6 +213,15 @@ int print_cpuinfo(void) case SOC_88F6828_ID: puts("MV88F6828-"); break; + case SOC_98DX3236_ID: + puts("98DX3236-"); + break; + case SOC_98DX3336_ID: + puts("98DX3336-"); + break; + case SOC_98DX4251_ID: + puts("98DX4251-"); + break; default: puts("Unknown-"); break; diff --git a/arch/arm/mach-mvebu/include/mach/cpu.h b/arch/arm/mach-mvebu/include/mach/cpu.h index d241eea9568d..b67b77ae0df4 100644 --- a/arch/arm/mach-mvebu/include/mach/cpu.h +++ b/arch/arm/mach-mvebu/include/mach/cpu.h @@ -65,6 +65,7 @@ enum { MVEBU_SOC_AXP, MVEBU_SOC_A375, MVEBU_SOC_A38X, + MVEBU_SOC_MSYS, MVEBU_SOC_UNKNOWN, }; diff --git a/arch/arm/mach-mvebu/include/mach/soc.h b/arch/arm/mach-mvebu/include/mach/soc.h index 0900e4008c12..cdd64fb28527 100644 --- a/arch/arm/mach-mvebu/include/mach/soc.h +++ b/arch/arm/mach-mvebu/include/mach/soc.h @@ -18,6 +18,9 @@ #define SOC_88F6810_ID 0x6810 #define SOC_88F6820_ID 0x6820 #define SOC_88F6828_ID 0x6828 +#define SOC_98DX3236_ID 0xf410 +#define SOC_98DX3336_ID 0xf400 +#define SOC_98DX4251_ID 0xfc00 /* A375 revisions */ #define MV_88F67XX_A0_ID 0x3