| Message ID | 20170607071149.12972-1-wens@csie.org |
|---|---|
| State | Accepted |
| Commit | 3474827294ca188446c8e52decd81a0908fd65e2 |
| Delegated to: | Jagannadha Sutradharudu Teki |
| Headers | show |
On Wed, Jun 07, 2017 at 03:11:49PM +0800, Chen-Yu Tsai wrote: > Currently we set the entry address in the psci_cpu_on function. > However R40 has a different register for this. This resulted in > an #ifdef / #else block in psci_cpu_on, which we avoided having > in the first place. > > Move this part into a separate function, defined differently for > the R40 as opposed to the other single cluster platforms. > > Signed-off-by: Chen-Yu Tsai <wens@csie.org> Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Maxime
On Wed, Jun 7, 2017 at 12:51 PM, Maxime Ripard <maxime.ripard@free-electrons.com> wrote: > On Wed, Jun 07, 2017 at 03:11:49PM +0800, Chen-Yu Tsai wrote: >> Currently we set the entry address in the psci_cpu_on function. >> However R40 has a different register for this. This resulted in >> an #ifdef / #else block in psci_cpu_on, which we avoided having >> in the first place. >> >> Move this part into a separate function, defined differently for >> the R40 as opposed to the other single cluster platforms. >> >> Signed-off-by: Chen-Yu Tsai <wens@csie.org> > > Acked-by: Maxime Ripard <maxime.ripard@free-electrons.com> Applied to u-boot-sunxi/master thanks!
diff --git a/arch/arm/cpu/armv7/sunxi/psci.c b/arch/arm/cpu/armv7/sunxi/psci.c index b3a34de1aafe..18da9cb8640a 100644 --- a/arch/arm/cpu/armv7/sunxi/psci.c +++ b/arch/arm/cpu/armv7/sunxi/psci.c @@ -118,6 +118,23 @@ static void __secure sunxi_power_switch(u32 *clamp, u32 *pwroff, bool on, } } +#ifdef CONFIG_MACH_SUN8I_R40 +/* secondary core entry address is programmed differently on R40 */ +static void __secure sunxi_set_entry_address(void *entry) +{ + writel((u32)entry, + SUNXI_SRAMC_BASE + SUN8I_R40_SRAMC_SOFT_ENTRY_REG0); +} +#else +static void __secure sunxi_set_entry_address(void *entry) +{ + struct sunxi_cpucfg_reg *cpucfg = + (struct sunxi_cpucfg_reg *)SUNXI_CPUCFG_BASE; + + writel((u32)entry, &cpucfg->priv0); +} +#endif + #ifdef CONFIG_MACH_SUN7I /* sun7i (A20) is different from other single cluster SoCs */ static void __secure sunxi_cpu_set_power(int __always_unused cpu, bool on) @@ -236,13 +253,7 @@ int __secure psci_cpu_on(u32 __always_unused unused, u32 mpidr, u32 pc) psci_save_target_pc(cpu, pc); /* Set secondary core power on PC */ -#ifdef CONFIG_MACH_SUN8I_R40 - /* secondary core entry address is programmed differently */ - writel((u32)&psci_cpu_entry, - SUNXI_SRAMC_BASE + SUN8I_R40_SRAMC_SOFT_ENTRY_REG0); -#else - writel((u32)&psci_cpu_entry, &cpucfg->priv0); -#endif + sunxi_set_entry_address(&psci_cpu_entry); /* Assert reset on target CPU */ writel(0, &cpucfg->cpu[cpu].rst);
Currently we set the entry address in the psci_cpu_on function. However R40 has a different register for this. This resulted in an #ifdef / #else block in psci_cpu_on, which we avoided having in the first place. Move this part into a separate function, defined differently for the R40 as opposed to the other single cluster platforms. Signed-off-by: Chen-Yu Tsai <wens@csie.org> --- arch/arm/cpu/armv7/sunxi/psci.c | 25 ++++++++++++++++++------- 1 file changed, 18 insertions(+), 7 deletions(-)