From patchwork Sun Nov 27 22:15:20 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vladimir Zapolskiy X-Patchwork-Id: 699774 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 3tRkhG4XFwz9t2g for ; Mon, 28 Nov 2016 09:17:34 +1100 (AEDT) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 0C96BB38B0; Sun, 27 Nov 2016 23:16:45 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id Vwh9wEUtwNz4; Sun, 27 Nov 2016 23:16:44 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 88748B3873; Sun, 27 Nov 2016 23:16:36 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 09D5DA75CC for ; Sun, 27 Nov 2016 23:15:50 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id PLA7OL-1ZE4k for ; Sun, 27 Nov 2016 23:15:49 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail.mleia.com (mleia.com [178.79.152.223]) by theia.denx.de (Postfix) with ESMTPS id 2C487A75A9 for ; Sun, 27 Nov 2016 23:15:46 +0100 (CET) Received: from mail.mleia.com (localhost [127.0.0.1]) by mail.mleia.com (Postfix) with ESMTP id 93CB438146A; Sun, 27 Nov 2016 22:15:45 +0000 (GMT) From: Vladimir Zapolskiy To: u-boot@lists.denx.de, Tom Rini Date: Mon, 28 Nov 2016 00:15:20 +0200 Message-Id: <20161127221536.9577-9-vz@mleia.com> X-Mailer: git-send-email 2.10.2 In-Reply-To: <20161127221536.9577-1-vz@mleia.com> References: <20161127221536.9577-1-vz@mleia.com> X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-49551924 X-CRM114-CacheID: sfid-20161127_221545_639120_49844806 X-CRM114-Status: UNSURE ( 9.08 ) X-CRM114-Notice: Please train this message. Subject: [U-Boot] [RESEND][PATCH 08/24] pci: sh7751: map PCI memory space into SDRAM X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" For ease of use and accounting a condition that on SH4 pci_phys_to_bus() and pci_bus_to_phys() are one in one mappings due to unimplemented __iomem() conversion, this change fixes access to SDRAM memory by PCI devices. This change also generalizes PCI system memory configuration, which is taken from board specific defines rather than hardcoded in the PCI host driver. Signed-off-by: Vladimir Zapolskiy --- drivers/pci/pci_sh7751.c | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/drivers/pci/pci_sh7751.c b/drivers/pci/pci_sh7751.c index 420ae81..8a50445 100644 --- a/drivers/pci/pci_sh7751.c +++ b/drivers/pci/pci_sh7751.c @@ -66,9 +66,6 @@ #define SH7751_PCI_IO_BASE 0xFE240000 #define SH7751_PCI_IO_SIZE 0x00040000 -#define SH7751_CS3_BASE_ADDR 0x0C000000 -#define SH7751_P2CS3_BASE_ADDR 0xAC000000 - #define SH7751_PCIPAR (vu_long *)0xFE2001C0 #define SH7751_PCIPDR (vu_long *)0xFE200220 @@ -153,11 +150,12 @@ int pci_sh7751_init(struct pci_controller *hose) /* Set up target memory mappings (for external DMA access) */ /* Map both P0 and P2 range to Area 3 RAM for ease of use */ - p4_out((64 - 1) << 20, SH7751_PCILSR0); - p4_out(SH7751_CS3_BASE_ADDR, SH7751_PCILAR0); + p4_out(CONFIG_SYS_SDRAM_SIZE - 0x100000, SH7751_PCILSR0); + p4_out(CONFIG_SYS_SDRAM_BASE & 0x1FF00000, SH7751_PCILAR0); + p4_out(CONFIG_SYS_SDRAM_BASE & 0xFFF00000, SH7751_PCICONF5); + p4_out(0, SH7751_PCILSR1); p4_out(0, SH7751_PCILAR1); - p4_out(SH7751_CS3_BASE_ADDR, SH7751_PCICONF5); p4_out(0xd0000000, SH7751_PCICONF6); /* Map memory window to same address on PCI bus */