From patchwork Wed Nov 9 10:21:33 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chen-Yu Tsai X-Patchwork-Id: 692703 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 3tDNwl2zkQz9vDW for ; Wed, 9 Nov 2016 22:19:03 +1100 (AEDT) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 960F9A75BF; Wed, 9 Nov 2016 12:18:45 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id OQFQr1NluM2U; Wed, 9 Nov 2016 12:18:45 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id C2E59A75C2; Wed, 9 Nov 2016 12:18:23 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 8013F4B99D for ; Wed, 9 Nov 2016 12:18:12 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id P60oTuULqQhw for ; Wed, 9 Nov 2016 12:18:12 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from wens.csie.org (mirror2.csie.ntu.edu.tw [140.112.30.76]) by theia.denx.de (Postfix) with ESMTPS id CD6914BA29 for ; Wed, 9 Nov 2016 12:18:07 +0100 (CET) Received: by wens.csie.org (Postfix, from userid 1000) id ABAB25FA5E; Wed, 9 Nov 2016 18:23:50 +0800 (CST) From: Chen-Yu Tsai To: Hans de Goede , u-boot@lists.denx.de Date: Wed, 9 Nov 2016 18:21:33 +0800 Message-Id: <20161109102136.13479-8-wens@csie.org> X-Mailer: git-send-email 2.10.2 In-Reply-To: <20161109102136.13479-1-wens@csie.org> References: <20161109102136.13479-1-wens@csie.org> Subject: [U-Boot] [PATCH 07/10] sunxi: Add support for TZPC on sun9i/A80 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" The A80 also has the TrustZone Protection Controller (TZPC), called the Secure Memory Touch Arbiter (SMTA). Enable non-secure access to all the peripherals at boot time. Signed-off-by: Chen-Yu Tsai Reviewed-by: Hans de Goede --- arch/arm/cpu/armv7/sunxi/Makefile | 1 + arch/arm/cpu/armv7/sunxi/tzpc.c | 6 ++++++ arch/arm/include/asm/arch-sunxi/cpu_sun9i.h | 1 + arch/arm/include/asm/arch-sunxi/tzpc.h | 4 ++++ arch/arm/mach-sunxi/board.c | 3 ++- 5 files changed, 14 insertions(+), 1 deletion(-) diff --git a/arch/arm/cpu/armv7/sunxi/Makefile b/arch/arm/cpu/armv7/sunxi/Makefile index b35b9df4a9d6..239c659ec032 100644 --- a/arch/arm/cpu/armv7/sunxi/Makefile +++ b/arch/arm/cpu/armv7/sunxi/Makefile @@ -11,6 +11,7 @@ obj-y += timer.o obj-$(CONFIG_MACH_SUN6I) += tzpc.o obj-$(CONFIG_MACH_SUN8I_H3) += tzpc.o +obj-$(CONFIG_MACH_SUN9I) += tzpc.o ifndef CONFIG_SPL_BUILD obj-$(CONFIG_ARMV7_PSCI) += psci.o diff --git a/arch/arm/cpu/armv7/sunxi/tzpc.c b/arch/arm/cpu/armv7/sunxi/tzpc.c index 6c8a0fd9a25b..2a2cf363b99c 100644 --- a/arch/arm/cpu/armv7/sunxi/tzpc.c +++ b/arch/arm/cpu/armv7/sunxi/tzpc.c @@ -24,4 +24,10 @@ void tzpc_init(void) writel(SUN8I_H3_TZPC_DECPORT1_ALL, &tzpc->decport1_set); writel(SUN8I_H3_TZPC_DECPORT2_ALL, &tzpc->decport2_set); #endif + +#ifdef CONFIG_MACH_SUN9I + writel(SUN9I_TZPC_DECPORT0_ALL, &tzpc->decport0_set); + writel(SUN9I_TZPC_DECPORT1_ALL, &tzpc->decport1_set); + writel(SUN9I_TZPC_DECPORT2_ALL, &tzpc->decport2_set); +#endif } diff --git a/arch/arm/include/asm/arch-sunxi/cpu_sun9i.h b/arch/arm/include/asm/arch-sunxi/cpu_sun9i.h index e9839eecaa92..25114174f395 100644 --- a/arch/arm/include/asm/arch-sunxi/cpu_sun9i.h +++ b/arch/arm/include/asm/arch-sunxi/cpu_sun9i.h @@ -90,6 +90,7 @@ #define SUNXI_TIMER_BASE (REGS_APB0_BASE + 0x0C00) #define SUNXI_PWM_BASE (REGS_APB0_BASE + 0x1400) #define SUNXI_LRADC_BASE (REGS_APB0_BASE + 0x1800) +#define SUNXI_TZPC_BASE (REGS_APB0_BASE + 0x3400) /* APB1 Module */ #define SUNXI_UART0_BASE (REGS_APB1_BASE + 0x0000) diff --git a/arch/arm/include/asm/arch-sunxi/tzpc.h b/arch/arm/include/asm/arch-sunxi/tzpc.h index 95c55cd4d130..3425d00edd97 100644 --- a/arch/arm/include/asm/arch-sunxi/tzpc.h +++ b/arch/arm/include/asm/arch-sunxi/tzpc.h @@ -29,6 +29,10 @@ struct sunxi_tzpc { #define SUN8I_H3_TZPC_DECPORT1_ALL 0xff #define SUN8I_H3_TZPC_DECPORT2_ALL 0x7f +#define SUN9I_TZPC_DECPORT0_ALL 0xfe +#define SUN9I_TZPC_DECPORT1_ALL 0x7f +#define SUN9I_TZPC_DECPORT2_ALL 0x00 + void tzpc_init(void); #endif /* _SUNXI_TZPC_H */ diff --git a/arch/arm/mach-sunxi/board.c b/arch/arm/mach-sunxi/board.c index 0f8ead980cdc..0053f562e00d 100644 --- a/arch/arm/mach-sunxi/board.c +++ b/arch/arm/mach-sunxi/board.c @@ -190,7 +190,8 @@ void s_init(void) "orr r0, r0, #1 << 6\n" "mcr p15, 0, r0, c1, c0, 1\n"); #endif -#if defined CONFIG_MACH_SUN6I || defined CONFIG_MACH_SUN8I_H3 +#if defined CONFIG_MACH_SUN6I || defined CONFIG_MACH_SUN8I_H3 || \ + defined CONFIG_MACH_SUN9I /* Enable non-secure access to some peripherals */ tzpc_init(); #endif