From patchwork Thu Oct 27 08:16:05 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chris Packham X-Patchwork-Id: 687503 X-Patchwork-Delegate: jagannadh.teki@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 3t4KVG5480z9sxS for ; Thu, 27 Oct 2016 19:16:37 +1100 (AEDT) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b=Tlc1le4E; dkim-atps=neutral Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 7BD37A7549; Thu, 27 Oct 2016 10:16:31 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id w5Xt7zP1RcR5; Thu, 27 Oct 2016 10:16:31 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 10D0F4BDBD; Thu, 27 Oct 2016 10:16:31 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id AA2554BDBD for ; Thu, 27 Oct 2016 10:16:28 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id ID1X-nEm-zvX for ; Thu, 27 Oct 2016 10:16:28 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-pf0-f196.google.com (mail-pf0-f196.google.com [209.85.192.196]) by theia.denx.de (Postfix) with ESMTPS id 299A04BD3D for ; Thu, 27 Oct 2016 10:16:21 +0200 (CEST) Received: by mail-pf0-f196.google.com with SMTP id s8so1943597pfj.2 for ; Thu, 27 Oct 2016 01:16:21 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20120113; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=MsMv9kB2HNaBiSrUwECwAdvT0gr2Ps/d5a8l5BF0Aw8=; b=Tlc1le4EWmT6s6MT3g73u1l1tz7zCAYHHHGnfdCZKo8OiY/N1exfqzCLpThbF3wJPX Ixpu4qT/jKZyxcavKmldcrJmeRGkj0a9Whx7NTuY1ISWFLtdad9ezRy6L9keLG5wcJXo UpimZxCDRF0XPvmsQ7JgBPilHBgC8VBNhpm1w9ApFF81nIChnjVqi7NhmWV0GzxduzHE OuoA7JivuAUqRcoUIuhJRxaUzhDn++Jd8iWWt9K+6z5tA7lyTHGyyaLaTvMJCc6iaVin P435lUMF1GZQKBvVe04ZlZdFaHI2o7D+kR8XZMPe/q2daLOyjTeVsCHzxT/cXw9enrUI G1HA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=MsMv9kB2HNaBiSrUwECwAdvT0gr2Ps/d5a8l5BF0Aw8=; b=Mxhl/wufLDVLSNLfYYQN6InDgaF9+MlreBN+NqId8hFn1dVfGQmGtdEqYh4hOXUr0g i7kTugHdBR2HMF7qSsN7gQuxGUpyuhVOVZp9CoErU4+dL9cIDfGSCOY5TkYAV3cJ7jUw lKYJcG2EpizqH6SD43r4hM9KGSoif/226kxTbUTxxeY2lPvXqhcFxT0qcCt04VgGE30i u4OBuJ/AMh8XanHhprRxZeFIpixJFh7r8jU6ujuPL1K4kMidpg9FRiOvImdriaYN+uZ+ 9H1rXpddUAojtTlQMqT4UQ/XIxg4HnOD9sfJRac6TJK5wxZW/AoLb1obIEjkUf/a+y9E 4JQA== X-Gm-Message-State: ABUngvc8WwTYZ6GuqNcJYooxGdPyj/V8wTMwnSw9gDzA0XCImbHyZq2wCIVUihehixsJCA== X-Received: by 10.99.60.13 with SMTP id j13mr10218949pga.24.1477556179408; Thu, 27 Oct 2016 01:16:19 -0700 (PDT) Received: from chrisp-dl.atlnz.lc ([2001:df5:b000:22:c443:2cc4:1e5e:5283]) by smtp.gmail.com with ESMTPSA id h185sm9461879pfe.35.2016.10.27.01.16.15 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 27 Oct 2016 01:16:18 -0700 (PDT) From: Chris Packham To: u-boot@lists.denx.de Date: Thu, 27 Oct 2016 21:16:05 +1300 Message-Id: <20161027081605.26475-1-judge.packham@gmail.com> X-Mailer: git-send-email 2.10.1 In-Reply-To: References: Cc: Jagan Teki , Albert Aribaud , Stefan Roese , Chris Packham Subject: [U-Boot] [PATCH v2] spi: kirkwood_spi: implement mvebu_spi_set_mode() X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Set the appropriate bits in the interface config register based on the SPI_ mode flags. Signed-off-by: Chris Packham --- Changes in v2: - Clear bits before updating arch/arm/include/asm/arch-mvebu/spi.h | 4 ++++ drivers/spi/kirkwood_spi.c | 15 +++++++++++++++ 2 files changed, 19 insertions(+) diff --git a/arch/arm/include/asm/arch-mvebu/spi.h b/arch/arm/include/asm/arch-mvebu/spi.h index 78869a253d1f..3545aed17347 100644 --- a/arch/arm/include/asm/arch-mvebu/spi.h +++ b/arch/arm/include/asm/arch-mvebu/spi.h @@ -52,6 +52,10 @@ struct kwspi_registers { #define KWSPI_ADRLEN_3BYTE (2 << 8) #define KWSPI_ADRLEN_4BYTE (3 << 8) #define KWSPI_ADRLEN_MASK (3 << 8) +#define KWSPI_CPOL (1 << 11) +#define KWSPI_CPHA (1 << 12) +#define KWSPI_TXLSBF (1 << 13) +#define KWSPI_RXLSBF (1 << 14) #define KWSPI_IRQUNMASK 1 /* unmask SPI interrupt */ #define KWSPI_IRQMASK 0 /* mask SPI interrupt */ diff --git a/drivers/spi/kirkwood_spi.c b/drivers/spi/kirkwood_spi.c index 6851ba942f51..791f3e8099c8 100644 --- a/drivers/spi/kirkwood_spi.c +++ b/drivers/spi/kirkwood_spi.c @@ -271,6 +271,21 @@ static int mvebu_spi_set_speed(struct udevice *bus, uint hz) static int mvebu_spi_set_mode(struct udevice *bus, uint mode) { + struct mvebu_spi_platdata *plat = dev_get_platdata(bus); + struct kwspi_registers *reg = plat->spireg; + u32 data = readl(®->cfg); + + data &= ~(KWSPI_CPHA | KWSPI_CPOL | KWSPI_RXLSBF | KWSPI_TXLSBF); + + if (mode & SPI_CPHA) + data |= KWSPI_CPHA; + if (mode & SPI_CPOL) + data |= KWSPI_CPOL; + if (mode & SPI_LSB_FIRST) + data |= (KWSPI_RXLSBF | KWSPI_TXLSBF); + + writel(data, ®->cfg); + return 0; }