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[202.36.163.2]) by smtp.gmail.com with ESMTPSA id d142sm7965180pfd.33.2016.10.19.21.31.53 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 19 Oct 2016 21:31:55 -0700 (PDT) From: Chris Packham To: u-boot@lists.denx.de Date: Thu, 20 Oct 2016 17:31:26 +1300 Message-Id: <20161020043127.20027-6-judge.packham@gmail.com> X-Mailer: git-send-email 2.10.0.479.g7c56b16 In-Reply-To: <20161020043127.20027-1-judge.packham@gmail.com> References: <20161020043127.20027-1-judge.packham@gmail.com> Cc: Scott Wood , Chris Packham , Scott Wood Subject: [U-Boot] [RFC PATCH v1 5/6] mtd: nand: pxa3xx-nand: fix random command timeouts X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" When 2 commands are submitted in a row, and the second is very quick, the completion of the second command might never come. This happens especially if the second command is quick, such as a status read after an erase Cc: Robert Jarzmik Signed-off-by: Chris Packham --- drivers/mtd/nand/pxa3xx_nand.c | 10 +++++++--- 1 file changed, 7 insertions(+), 3 deletions(-) diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c index 3c065169ce9c..9a43bd11a453 100644 --- a/drivers/mtd/nand/pxa3xx_nand.c +++ b/drivers/mtd/nand/pxa3xx_nand.c @@ -619,8 +619,14 @@ static irqreturn_t pxa3xx_nand_irq(struct pxa3xx_nand_info *info) is_ready = 1; } + /* + * Clear all status bit before issuing the next command, which + * can and will alter the status bits and will deserve a new + * interrupt on its own. This lets the controller exit the IRQ + */ + nand_writel(info, NDSR, status); + if (status & NDSR_WRCMDREQ) { - nand_writel(info, NDSR, NDSR_WRCMDREQ); status &= ~NDSR_WRCMDREQ; info->state = STATE_CMD_HANDLE; @@ -641,8 +647,6 @@ static irqreturn_t pxa3xx_nand_irq(struct pxa3xx_nand_info *info) nand_writel(info, NDCB0, info->ndcb3); } - /* clear NDSR to let the controller exit the IRQ */ - nand_writel(info, NDSR, status); if (is_completed) info->cmd_complete = 1; if (is_ready)