From patchwork Sat Oct 1 14:19:26 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Burton X-Patchwork-Id: 677366 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 3smVwB3lFyz9s2G for ; Sun, 2 Oct 2016 00:25:46 +1000 (AEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id E336DB380E; Sat, 1 Oct 2016 16:25:44 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id XOOqfAuz84LF; Sat, 1 Oct 2016 16:25:44 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 37EDCA761F; Sat, 1 Oct 2016 16:25:44 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id DC3DDA7629 for ; Sat, 1 Oct 2016 16:25:41 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 3HWW-vUuDZpc for ; Sat, 1 Oct 2016 16:25:41 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mailapp01.imgtec.com (mailapp02.imgtec.com [217.156.133.132]) by theia.denx.de (Postfix) with ESMTP id A74A0A761F for ; Sat, 1 Oct 2016 16:25:39 +0200 (CEST) Received: from HHMAIL03.hh.imgtec.org (unknown [10.44.0.21]) by Forcepoint Email with ESMTPS id 02B90E4B33BB6; Sat, 1 Oct 2016 15:25:35 +0100 (IST) Received: from localhost (192.168.159.74) by HHMAIL03.hh.imgtec.org (10.44.0.22) with Microsoft SMTP Server (TLS) id 14.3.294.0; Sat, 1 Oct 2016 15:25:38 +0100 From: Paul Burton To: Date: Sat, 1 Oct 2016 15:19:26 +0100 Message-ID: <20161001141931.32354-24-paul.burton@imgtec.com> X-Mailer: git-send-email 2.10.0 In-Reply-To: <20161001141931.32354-1-paul.burton@imgtec.com> References: <20161001141931.32354-1-paul.burton@imgtec.com> MIME-Version: 1.0 X-Originating-IP: [192.168.159.74] Subject: [U-Boot] [PATCH 23/27] boston: Provide physical CONFIG_SYS_SDRAM_BASE X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" README states that CONFIG_SYS_SDRAM_BASE should the physical base address of SDRAM, whilst up until now various pieces of generic code have presumed that it can be directly accessed by the CPU & MIPS has provided a virtual address for CONFIG_SYS_SDRAM_BASE. Other generic code expects CONFIG_SYS_SDRAM_BASE to be a physical address, which makes the inconsistency a mess. Now that the preceding patches have prepared us to handle using a physical CONFIG_SYS_SDRAM_BASE, clean up the inconsistency for boston by providing a physical CONFIG_SYS_SDRAM_BASE. A side effect of this & use of phys_to_virt is that on MIPS64 U-Boot will now access DDR through the xkphys region of the virtual address space rather than ckseg0, which necessitates the change to board_get_usable_ram_top(). Signed-off-by: Paul Burton Cc: Daniel Schwierzeck --- board/imgtec/boston/ddr.c | 8 ++------ include/configs/boston.h | 21 ++++++++++----------- 2 files changed, 12 insertions(+), 17 deletions(-) diff --git a/board/imgtec/boston/ddr.c b/board/imgtec/boston/ddr.c index ceffef6..e765627 100644 --- a/board/imgtec/boston/ddr.c +++ b/board/imgtec/boston/ddr.c @@ -5,6 +5,7 @@ */ #include +#include #include @@ -21,10 +22,5 @@ ulong board_get_usable_ram_top(ulong total_size) { DECLARE_GLOBAL_DATA_PTR; - if (gd->ram_top < CONFIG_SYS_SDRAM_BASE) { - /* 2GB wrapped around to 0 */ - return CKSEG0ADDR(256 << 20); - } - - return min_t(unsigned long, gd->ram_top, CKSEG0ADDR(256 << 20)); + return min_t(ulong, gd->ram_top, (ulong)phys_to_virt(SZ_256M)); } diff --git a/include/configs/boston.h b/include/configs/boston.h index e958054..37060b0 100644 --- a/include/configs/boston.h +++ b/include/configs/boston.h @@ -27,20 +27,19 @@ /* * Memory map */ -#ifdef CONFIG_64BIT -# define CONFIG_SYS_SDRAM_BASE 0xffffffff80000000 -#else -# define CONFIG_SYS_SDRAM_BASE 0x80000000 -#endif - +#define CONFIG_SYS_SDRAM_BASE 0x0 #define CONFIG_SYS_INIT_SP_OFFSET 0x400000 - #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE -#define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x100000) - -#define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE + 0) -#define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x10000000) +#ifdef CONFIG_64BIT +# define CONFIG_SYS_LOAD_ADDR 0xffffffff80100000 +# define CONFIG_SYS_MEMTEST_START 0xffffffff80000000 +# define CONFIG_SYS_MEMTEST_END 0xffffffff90000000 +#else +# define CONFIG_SYS_LOAD_ADDR 0x80100000 +# define CONFIG_SYS_MEMTEST_START 0x80000000 +# define CONFIG_SYS_MEMTEST_END 0x90000000 +#endif #define CONFIG_SYS_MALLOC_LEN (256 * 1024)