From patchwork Mon Sep 26 18:29:16 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Paul Burton X-Patchwork-Id: 675298 X-Patchwork-Delegate: daniel.schwierzeck@googlemail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 3sjXhD579pz9s3T for ; Tue, 27 Sep 2016 04:35:08 +1000 (AEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 83A01A7527; Mon, 26 Sep 2016 20:35:01 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id XVF3I_d4uwqc; Mon, 26 Sep 2016 20:35:01 +0200 (CEST) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id D068EA7636; Mon, 26 Sep 2016 20:35:00 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 34C3CA7558 for ; Mon, 26 Sep 2016 20:34:58 +0200 (CEST) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id bLvRSS9L385z for ; Mon, 26 Sep 2016 20:34:58 +0200 (CEST) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mailapp01.imgtec.com (mailapp02.imgtec.com [217.156.133.132]) by theia.denx.de (Postfix) with ESMTP id 02451A7527 for ; Mon, 26 Sep 2016 20:34:56 +0200 (CEST) Received: from HHMAIL01.hh.imgtec.org (unknown [10.100.10.19]) by Forcepoint Email with ESMTPS id DFF8CE5F1A67F; Mon, 26 Sep 2016 19:34:51 +0100 (IST) Received: from localhost (10.100.200.111) by HHMAIL01.hh.imgtec.org (10.100.10.21) with Microsoft SMTP Server (TLS) id 14.3.294.0; Mon, 26 Sep 2016 19:34:54 +0100 From: Paul Burton To: , Daniel Schwierzeck Date: Mon, 26 Sep 2016 19:29:16 +0100 Message-ID: <20160926182917.27531-23-paul.burton@imgtec.com> X-Mailer: git-send-email 2.10.0 In-Reply-To: <20160926182917.27531-1-paul.burton@imgtec.com> References: <20160926182917.27531-1-paul.burton@imgtec.com> MIME-Version: 1.0 X-Originating-IP: [10.100.200.111] Subject: [U-Boot] [PATCH 22/23] boston: Probe ethernet controller during boot X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Add compatible strings for the PCIe bridges & EG20T ethernet controller such that the devices are probed during boot, without the user needing to manually cause that to happen by running "pci enum" after boot. This allows for use of the ethernet controller without the manual PCI enumeration step. Enable the GPIO driver to provide the PHY reset GPIO. Signed-off-by: Paul Burton --- arch/mips/Kconfig | 1 + arch/mips/dts/img,boston.dts | 6 +++--- configs/boston32r2_defconfig | 1 + configs/boston32r2el_defconfig | 1 + configs/boston64r2_defconfig | 1 + configs/boston64r2el_defconfig | 1 + 6 files changed, 8 insertions(+), 3 deletions(-) diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 9fa41e9..407dad8 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig @@ -78,6 +78,7 @@ config MACH_PIC32 config TARGET_BOSTON bool "Support Boston" select DM + select DM_GPIO select DM_SERIAL select OF_CONTROL select MIPS_CM diff --git a/arch/mips/dts/img,boston.dts b/arch/mips/dts/img,boston.dts index 1d4eeda..1623a25 100644 --- a/arch/mips/dts/img,boston.dts +++ b/arch/mips/dts/img,boston.dts @@ -130,7 +130,7 @@ }; pci2_root@0,0,0 { - compatible = "pci10ee,7021"; + compatible = "pci10ee,7021", "pci-bridge"; reg = <0x00000000 0 0 0 0>; #address-cells = <3>; @@ -138,7 +138,7 @@ #interrupt-cells = <1>; eg20t_bridge@1,0,0 { - compatible = "pci8086,8800"; + compatible = "pci8086,8800", "pci-bridge"; reg = <0x00010000 0 0 0 0>; #address-cells = <3>; @@ -146,7 +146,7 @@ #interrupt-cells = <1>; eg20t_mac@2,0,1 { - compatible = "pci8086,8802"; + compatible = "pci8086,8802", "intel,pch-gbe"; reg = <0x00020100 0 0 0 0>; phy-reset-gpios = <&eg20t_gpio 6 GPIO_ACTIVE_LOW>; }; diff --git a/configs/boston32r2_defconfig b/configs/boston32r2_defconfig index 6b38da9..61360c5 100644 --- a/configs/boston32r2_defconfig +++ b/configs/boston32r2_defconfig @@ -32,6 +32,7 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_OF_EMBED=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_CLK=y +CONFIG_EG20T_GPIO=y CONFIG_MTD=y CONFIG_CFI_FLASH=y CONFIG_DM_ETH=y diff --git a/configs/boston32r2el_defconfig b/configs/boston32r2el_defconfig index d56c405..74d16ea 100644 --- a/configs/boston32r2el_defconfig +++ b/configs/boston32r2el_defconfig @@ -33,6 +33,7 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_OF_EMBED=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_CLK=y +CONFIG_EG20T_GPIO=y CONFIG_MTD=y CONFIG_CFI_FLASH=y CONFIG_DM_ETH=y diff --git a/configs/boston64r2_defconfig b/configs/boston64r2_defconfig index 2c0ac4d..4d67804 100644 --- a/configs/boston64r2_defconfig +++ b/configs/boston64r2_defconfig @@ -32,6 +32,7 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_OF_EMBED=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_CLK=y +CONFIG_EG20T_GPIO=y CONFIG_MTD=y CONFIG_CFI_FLASH=y CONFIG_DM_ETH=y diff --git a/configs/boston64r2el_defconfig b/configs/boston64r2el_defconfig index e784d68..e0d514f 100644 --- a/configs/boston64r2el_defconfig +++ b/configs/boston64r2el_defconfig @@ -33,6 +33,7 @@ CONFIG_CMD_FS_GENERIC=y CONFIG_OF_EMBED=y CONFIG_NET_RANDOM_ETHADDR=y CONFIG_CLK=y +CONFIG_EG20T_GPIO=y CONFIG_MTD=y CONFIG_CFI_FLASH=y CONFIG_DM_ETH=y