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[U-Boot,08/11] drivers/ddr/marvell: Default DRAM_ECC to 0

Message ID 20151213002856.BE93021533@mail.nwl.cc
State Superseded
Delegated to: Prafulla Wadaskar
Headers show

Commit Message

Phil Sutter Dec. 13, 2015, 12:29 a.m. UTC 
Not all boards implementing an Armada XP chip are equipped with ECC RAM.
Defining DRAM_ECC to 1 enables ECC without a chance to turn it off in
board configs, which breaks DDR training for them.

Signed-off-by: Phil Sutter <phil@nwl.cc>
---
 drivers/ddr/marvell/axp/ddr3_axp_config.h | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
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Patch

diff --git a/drivers/ddr/marvell/axp/ddr3_axp_config.h b/drivers/ddr/marvell/axp/ddr3_axp_config.h
index a672044..800d2d1 100644
--- a/drivers/ddr/marvell/axp/ddr3_axp_config.h
+++ b/drivers/ddr/marvell/axp/ddr3_axp_config.h
@@ -44,7 +44,7 @@ 
  * DDR3_TRAINING_DEBUG - Debug prints of internal code
  */
 #define DDR_TARGET_FABRIC			5
-#define DRAM_ECC				1
+#define DRAM_ECC				0
 
 #ifdef MV_DDR_32BIT
 #define BUS_WIDTH                               32