@@ -709,6 +709,7 @@ static int atmel_pmecc_nand_init_params(struct nand_chip *nand,
nand->ecc.read_page = atmel_nand_pmecc_read_page;
nand->ecc.write_page = atmel_nand_pmecc_write_page;
+ nand->ecc.strength = cap;
atmel_pmecc_core_init(mtd);
@@ -374,9 +374,11 @@ int board_nand_init(struct nand_chip *chip)
if (!NAND_IS_512()) {
chip->ecc.bytes = 3;
chip->ecc.size = 256;
+ chip->ecc.strength = 1;
} else {
chip->ecc.bytes = 6;
chip->ecc.size = 512;
+ chip->ecc.strength = 2;
}
chip->ecc.mode = NAND_ECC_HW;
chip->ecc.calculate = bfin_nfc_calculate_ecc;
@@ -613,6 +613,7 @@ void davinci_nand_init(struct nand_chip *nand)
nand->ecc.mode = NAND_ECC_HW;
nand->ecc.size = 512;
nand->ecc.bytes = 3;
+ nand->ecc.strength = 1;
nand->ecc.calculate = nand_davinci_calculate_ecc;
nand->ecc.correct = nand_davinci_correct_data;
nand->ecc.hwctl = nand_davinci_enable_hwecc;
@@ -623,6 +624,7 @@ void davinci_nand_init(struct nand_chip *nand)
nand->ecc.mode = NAND_ECC_HW_OOB_FIRST;
nand->ecc.size = 512;
nand->ecc.bytes = 10;
+ nand->ecc.strength = 4;
nand->ecc.calculate = nand_davinci_4bit_calculate_ecc;
nand->ecc.correct = nand_davinci_4bit_correct_data;
nand->ecc.hwctl = nand_davinci_4bit_enable_hwecc;
@@ -1658,6 +1658,7 @@ static int __init doc_probe(unsigned long physadr)
nand->ecc.mode = NAND_ECC_HW_SYNDROME;
nand->ecc.size = 512;
nand->ecc.bytes = 6;
+ nand->ecc.strength = 2;
nand->bbt_options = NAND_BBT_USE_FLASH;
doc->physadr = physadr;
@@ -769,6 +769,7 @@ static int fsl_elbc_chip_init(int devnum, u8 *addr)
nand->ecc.size = 512;
nand->ecc.bytes = 3;
nand->ecc.steps = 1;
+ nand->ecc.strength = 1;
} else {
/* otherwise fall back to default software ECC */
nand->ecc.mode = NAND_ECC_SOFT;
@@ -890,11 +890,13 @@ static int fsl_ifc_chip_init(int devnum, u8 *addr)
bbt_mirror_descr.offs = 0;
}
+ nand->ecc.strength = 4;
priv->bufnum_mask = 15;
break;
case CSOR_NAND_PGS_2K:
layout = &oob_2048_ecc4;
+ nand->ecc.strength = 4;
priv->bufnum_mask = 3;
break;
@@ -902,8 +904,10 @@ static int fsl_ifc_chip_init(int devnum, u8 *addr)
if ((csor & CSOR_NAND_ECC_MODE_MASK) ==
CSOR_NAND_ECC_MODE_4) {
layout = &oob_4096_ecc4;
+ nand->ecc.strength = 4;
} else {
layout = &oob_4096_ecc8;
+ nand->ecc.strength = 8;
nand->ecc.bytes = 16;
}
@@ -453,6 +453,7 @@ int fsmc_nand_init(struct nand_chip *nand)
switch (fsmc_version) {
case FSMC_VER8:
nand->ecc.bytes = 13;
+ nand->ecc.strength = 8;
nand->ecc.correct = fsmc_bch8_correct_data;
nand->ecc.read_page = fsmc_read_page_hwecc;
if (mtd->writesize == 512)
@@ -467,6 +468,7 @@ int fsmc_nand_init(struct nand_chip *nand)
break;
default:
nand->ecc.bytes = 3;
+ nand->ecc.strength = 1;
nand->ecc.layout = &fsmc_ecc1_layout;
nand->ecc.correct = nand_correct_data;
break;
@@ -253,6 +253,7 @@ int board_nand_init(struct nand_chip *nand)
nand->ecc.mode = NAND_ECC_HW_OOB_FIRST;
nand->ecc.size = CONFIG_SYS_NAND_ECCSIZE;
nand->ecc.bytes = CONFIG_SYS_NAND_ECCBYTES;
+ nand->ecc.strength = 4;
nand->ecc.layout = &qi_lb60_ecclayout_2gb;
nand->chip_delay = 50;
nand->options = NAND_USE_FLASH_BBT;
@@ -1242,6 +1242,13 @@ int board_nand_init(struct nand_chip *this)
this->ecc.mode = NAND_ECC_HW;
}
+ if (this->ecc.mode == NAND_ECC_HW) {
+ if (is_mxc_nfc_1())
+ this->ecc.strength = 1;
+ else
+ this->ecc.strength = 4;
+ }
+
host->pagesize_2k = 0;
this->ecc.size = 512;
@@ -869,7 +869,7 @@ static int mxs_nand_hook_block_markbad(struct mtd_info *mtd, loff_t ofs)
* what to do.
*/
static int mxs_nand_ecc_read_oob(struct mtd_info *mtd, struct nand_chip *nand,
- int page, int cmd)
+ int page)
{
struct mxs_nand_info *nand_info = nand->priv;
@@ -1166,6 +1166,7 @@ int board_nand_init(struct nand_chip *nand)
nand->ecc.mode = NAND_ECC_HW;
nand->ecc.bytes = 9;
nand->ecc.size = 512;
+ nand->ecc.strength = 8;
return 0;
@@ -3233,6 +3233,7 @@ int nand_scan_tail(struct mtd_info *mtd)
if (!chip->ecc.size)
chip->ecc.size = 256;
chip->ecc.bytes = 3;
+ chip->ecc.strength = 1;
break;
case NAND_ECC_SOFT_BCH:
@@ -616,7 +616,7 @@ int nand_write_skip_bad(nand_info_t *nand, loff_t offset, size_t *length,
ops.datbuf = p_buffer;
ops.oobbuf = ops.datbuf + pagesize;
- rval = nand->write_oob(nand, offset, &ops);
+ rval = mtd_write_oob(nand, offset, &ops);
if (rval != 0)
break;
@@ -216,6 +216,7 @@ int board_nand_init(struct nand_chip *nand)
nand->ecc.mode = NAND_ECC_HW;
nand->ecc.size = 256;
nand->ecc.bytes = 3;
+ nand->ecc.strength = 1;
nand->select_chip = ndfc_select_chip;
#ifdef CONFIG_SYS_NAND_BUSWIDTH_16BIT
@@ -212,6 +212,7 @@ int board_nand_init(struct nand_chip *chip)
chip->ecc.mode = NAND_ECC_HW;
chip->ecc.bytes = 3;
chip->ecc.size = 512;
+ chip->ecc.strength = 1;
chip->ecc.layout = &nomadik_ecc_layout;
chip->ecc.calculate = nomadik_ecc_calculate;
chip->ecc.hwctl = nomadik_ecc_hwctl;
@@ -590,11 +590,12 @@ static int omap_correct_data_bch(struct mtd_info *mtd, uint8_t *dat,
* @mtd: mtd info structure
* @chip: nand chip info structure
* @buf: buffer to store read data
+ * @oob_required: caller expects OOB data read to chip->oob_poi
* @page: page number to read
*
*/
static int omap_read_page_bch(struct mtd_info *mtd, struct nand_chip *chip,
- uint8_t *buf, int page)
+ uint8_t *buf, int oob_required, int page)
{
int i, eccsize = chip->ecc.size;
int eccbytes = chip->ecc.bytes;
@@ -804,6 +805,7 @@ void omap_nand_switch_ecc(uint32_t hardware, uint32_t eccstrength)
nand->ecc.hwctl = NULL;
nand->ecc.correct = NULL;
nand->ecc.calculate = NULL;
+ nand->ecc.strength = eccstrength;
/* Setup the ecc configurations again */
if (hardware) {
@@ -173,6 +173,7 @@ int board_nand_init(struct nand_chip *nand)
nand->ecc.mode = NAND_ECC_HW;
nand->ecc.size = CONFIG_SYS_NAND_ECCSIZE;
nand->ecc.bytes = CONFIG_SYS_NAND_ECCBYTES;
+ nand->ecc.strength = 1;
#else
nand->ecc.mode = NAND_ECC_SOFT;
#endif
@@ -1014,6 +1014,7 @@ int tegra_nand_init(struct nand_chip *nand, int devnum)
nand->ecc.write_page_raw = nand_write_page_raw;
nand->ecc.read_oob = nand_read_oob;
nand->ecc.write_oob = nand_write_oob;
+ nand->ecc.strength = 1;
nand->select_chip = nand_select_chip;
nand->dev_ready = nand_dev_ready;
nand->priv = &nand_ctrl;