diff mbox

[U-Boot,2/2] edb93xx sdram: fix initialization

Message ID 20100212172431.GN15905@darwin
State Not Applicable
Delegated to: Albert ARIBAUD
Headers show

Commit Message

Matthias Kaehlcke Feb. 12, 2010, 5:24 p.m. UTC 
hi alessandro,

El Fri, Feb 12, 2010 at 10:23:58AM +0100 Matthias Kaehlcke ha dit:

> El Fri, Feb 12, 2010 at 08:01:26AM +0100 Alessandro Rubini ha dit:
> 
> > > i gave my ack after a visual review of the patch, without having
> > > tested it. i just installed a patched u-boot on one of my boards and
> > > it doesn't boot :(
> > 
> > Oh. The opposite of my board.
> > 
> > Then, since I don't have a 9315A but only a similar one, it's better
> > to drop the patch.  I'll have a different sdram_cfg file for mine,
> > then.
> 
> i'm pretty sure we'll be able to track this down, the purpose of your
> patch is correct, i actually wonder why the current code works ...
> 
> if we can't solve the issue in the next days, you could still send a
> patch which only writes the GlConfig register in
> program_mode_registers(). this would fix at least on of the issues and
> make your code less different from the one in the tree

maybe i have found a clue: i think the original assembly code wasn't
correct either. the comment talks about reading from each bank, but
then code like this is excuted:

ldr r0, =0x00000000 /* A[22:21] = b00 */
str r0, [r0]

which *writes* to the bank, but doesn't read from it.

according to the errata note a bank is precharged by reading from
it. the current code does this, but before the bank is configured
properly. i suspect that is the cause for the hang i see on my
boards. i've put together some code which does the precharge after
setting up the mode registers. on my boards based on the edb9301 and
edb9307a design u-boot boots with this code.

below you find a patch, could you give it a try on your board, when
you find some time and feel well enough?

thanks

Matthias

---

Comments

Alessandro Rubini Feb. 12, 2010, 11:01 p.m. UTC | #1 
Hello Matthias.
I'm sorry I can't test before wednesday as I'll be offline.

I am doubtful, as usually precharge is done before setting mode, but
your chips are clearly different from mine, I now expect that no
sequence works for both of them.

/alessandro
diff mbox

Patch

diff --git a/board/edb93xx/sdram_cfg.c b/board/edb93xx/sdram_cfg.c
index 6155f0e..f3db750 100644
--- a/board/edb93xx/sdram_cfg.c
+++ b/board/edb93xx/sdram_cfg.c
@@ -47,25 +47,27 @@  void sdram_cfg(void)
 
 	early_udelay(200);
 
-	force_precharge();
+	/*
+	 * Errata of most EP93xx revisions say that PRECHARGE ALL isn't always
+	 * issued, so we omit it at this point. Instead we force a precharge
+	 * after having programmed the mode registers
+	 */
 
 	setup_refresh_timer();
 
 	program_mode_registers();
 
-	/* Select normal operation mode */
-	writel(GLCONFIG_CKE, &sdram->glconfig);
+	force_precharge();
 }
 
 static void force_precharge(void)
 {
-	/*
-	 * Errata most EP93xx revisions say that PRECHARGE ALL isn't always
-	 * issued.
-	 *
-	 * Do a read from each bank to make sure they're precharged
-	 */
+	struct sdram_regs *sdram = (struct sdram_regs *)SDRAM_BASE;
+
+	/* Select normal operation mode */
+	writel(GLCONFIG_CKE, &sdram->glconfig);
 
+	/* Do a read from each bank to make sure they're precharged */
 	PRECHARGE_BANK(0);
 	PRECHARGE_BANK(1);
 	PRECHARGE_BANK(2);
@@ -101,6 +103,11 @@  static void setup_refresh_timer(void)
 
 static void program_mode_registers(void)
 {
+	struct sdram_regs *sdram = (struct sdram_regs *)SDRAM_BASE;
+
+	/* Select mode register update mode */
+	writel(GLCONFIG_MRS | GLCONFIG_CKE, &sdram->glconfig);
+
 	/*
 	 * The mode registers are programmed by performing a read from each
 	 * SDRAM bank. The value of the address that is read defines the value