From patchwork Mon Sep 14 09:43:43 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: =?utf-8?b?Q2h1bmZlbmcgWXVuICjkupHmmKXls7Ap?= X-Patchwork-Id: 1363467 X-Patchwork-Delegate: marek.vasut@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=pass (p=none dis=none) header.from=mediatek.com Authentication-Results: ozlabs.org; dkim=pass (1024-bit key; unprotected) header.d=mediatek.com header.i=@mediatek.com header.a=rsa-sha256 header.s=dk header.b=ErWuMVjl; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4BqhMR6QBGz9sTM for ; Mon, 14 Sep 2020 19:46:27 +1000 (AEST) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 15DE082304; Mon, 14 Sep 2020 11:46:24 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=mediatek.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=pass (1024-bit key; unprotected) header.d=mediatek.com header.i=@mediatek.com header.b="ErWuMVjl"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 7CB7A82304; Mon, 14 Sep 2020 11:46:22 +0200 (CEST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: X-Spam-Status: No, score=0.8 required=5.0 tests=BAYES_00,DKIM_INVALID, DKIM_SIGNED,MIME_BASE64_TEXT,RDNS_NONE,SPF_HELO_NONE,UNPARSEABLE_RELAY, URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.2 Received: from mailgw02.mediatek.com (unknown [210.61.82.184]) by phobos.denx.de (Postfix) with ESMTP id DD96481EE4 for ; Mon, 14 Sep 2020 11:46:11 +0200 (CEST) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=mediatek.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=chunfeng.yun@mediatek.com X-UUID: ccdb202aa1c3469aace472eefb86c8c6-20200914 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=EhvK6h0gMQoWWTgEI0/wUrt3HKlzIXBZKFqSf5S/y9A=; b=ErWuMVjlvrgdr4TtZNaZkc/zjAcwOV16SmS520m5xfVPCkIIFPkj6/sndi/ZzTIwBmZ75piGh2PqL+2pi73bJMkaICja3xfGhFPSKC6FiWbcRyw4bLIFRUQtfHPS/eFdbgq9NkW5zetrysXm5X0QdlY72J5u3cm5/bukGowav9o=; X-UUID: ccdb202aa1c3469aace472eefb86c8c6-20200914 Received: from mtkcas07.mediatek.inc [(172.21.101.84)] by mailgw02.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.14 Build 0819 with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 491026720; Mon, 14 Sep 2020 17:46:01 +0800 Received: from mtkcas07.mediatek.inc (172.21.101.84) by mtkmbs08n2.mediatek.inc (172.21.101.56) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 14 Sep 2020 17:45:58 +0800 Received: from localhost.localdomain (10.17.3.153) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 14 Sep 2020 17:45:57 +0800 From: Chunfeng Yun To: Marek Vasut , Lukasz Majewski , Bin Meng CC: Mingming lee , Ryder Lee , Weijie Gao , Chunfeng Yun , GSS_MTK_Uboot_upstream , Heinrich Schuchardt , Lokesh Vutla , Simon Glass , Stefan Roese , Michal Simek , Stefan Bosch , Alex Nemirovsky , Rayagonda Kokatanur , Patrice Chotard , Sam Protsenko , Priyanka Jain , Amit Singh Tomar , Kever Yang , Jagan Teki , Frank Wang , T Karthik Reddy , Siva Durga Prasad Paladugu , Roger Quadros , , Tom Rini , Frank Wunderlich Subject: [PATCH v6 02/10] dt-bindings: usb: mtu3: add bindings for MediaTek USB3 DRD Date: Mon, 14 Sep 2020 17:43:43 +0800 Message-ID: <1600076631-5928-3-git-send-email-chunfeng.yun@mediatek.com> X-Mailer: git-send-email 1.8.1.1.dirty In-Reply-To: <1600076631-5928-1-git-send-email-chunfeng.yun@mediatek.com> References: <1600076631-5928-1-git-send-email-chunfeng.yun@mediatek.com> MIME-Version: 1.0 X-TM-SNTS-SMTP: 6E2B03BA1B1D7D76F9829F13FFC30FA08EF97781C033B9EF39F78A431762B8A42000:8 X-MTK: N X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.34 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.102.3 at phobos.denx.de X-Virus-Status: Clean Add dt-binding for MediaTek USB3 DRD Driver Signed-off-by: Chunfeng Yun --- v5~v6: no changes v4: Add support host mode, introduce some new properties and subnode v2~v3: no changes --- doc/device-tree-bindings/usb/mediatek,mtu3.txt | 79 ++++++++++++++++++++++++++ 1 file changed, 79 insertions(+) create mode 100644 doc/device-tree-bindings/usb/mediatek,mtu3.txt diff --git a/doc/device-tree-bindings/usb/mediatek,mtu3.txt b/doc/device-tree-bindings/usb/mediatek,mtu3.txt new file mode 100644 index 0000000..ab877bf --- /dev/null +++ b/doc/device-tree-bindings/usb/mediatek,mtu3.txt @@ -0,0 +1,79 @@ +The device node for Mediatek USB3 DRD controller + +Required properties: + - compatible : should be "mediatek,-mtu3", "mediatek,mtu3", + soc-model is the name of SoC, such as mt8512 etc, + when using "mediatek,mtu3" compatible string, you need SoC specific + ones in addition, one of: + - "mediatek,mt8512-mtu3" + - reg : specifies physical base address and size of the registers + - reg-names: should be + - "ippc" : IP Port Control + - power-domains : a phandle to USB power domain node to control USB's MTCMOS + - clocks : a list of phandle + clock-specifier pairs, one for each + entry in clock-names + - clock-names : must contain "sys_ck" for clock of controller, + the following clocks are optional: + "ref_ck", "mcu_ck", "dma_ck" and "xhci_ck"; + - phys : list of all the USB PHYs on this HCD + - #address-cells, #size-cells : used for sub-nodes with 'reg' property + - ranges : allows valid 1:1 translation between child's address space and + parent's address space + +Optional properties: + - vusb33-supply : regulator of USB AVDD3.3v + - vbus-supply : regulator of VBUS 5v, needed when supports host mode. + +Sub-nodes: +Required properties: + - compatible : should be "mediatek,ssusb" + - reg : specifies physical base address and size of the registers + - reg-names: should be + - "mac" : SSUSB MAC, include xHCI and device + - interrupts : interrupt used by xHCI or device + - dr_mode : should be one of "host" or "peripheral", + see : usb/generic.txt + +Optional properties: + - pinctrl-names : a pinctrl state named "default" is optional + - pinctrl-0 : pin control group + See: pinctrl/pinctrl-bindings.txt + + - device mode: + - maximum-speed : valid arguments are "full-speed", "high-speed", + "super-speed" and "super-speed-plus", + see: usb/generic.txt + - mediatek,force-vbus : force vbus as valid by SW + + - host mode (dr_mode is "host"): + - mediatek,u3p-dis-msk : mask to disable u3ports, bit0 for u3port0, + bit1 for u3port1, ... etc; + +Example: +usb3: usb@11213e00 { + compatible = "mediatek,mt8512-mtu3", "mediatek,mtu3"; + reg = <0x11213e00 0x0100>; + reg-names = "ippc"; + phys = <&u2port0 PHY_TYPE_USB2>, <&u2port1 PHY_TYPE_USB2>; + power-domains = <&scpsys MT8512_POWER_DOMAIN_USB>; + clocks = <&infracfg CLK_INFRA_USB_SYS>, + <&topckgen CLK_TOP_SSUSB_TOP_CK_EN>, + <&infracfg CLK_INFRA_ICUSB>; + clock-names = "sys_ck", "ref_ck", "mcu_ck"; + vusb33-supply = ; + vbus-supply = <&usb_p0_vbus>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + status = "disabled"; + + ssusb: usb@11210000 { + compatible = "mediatek,ssusb"; + reg = <0x11210000 0x3e00>; + interrupts = ; + reg-names = "mac"; + dr_mode = "peripheral"; + maximum-speed = "high-speed"; + status = "disabled"; + }; +};