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Mon, 22 Jun 2020 12:28:23 +0000 From: Sagar Shrikant Kadam To: u-boot@lists.denx.de Cc: rick@andestech.com, paul.walmsley@sifive.com, palmer@dabbelt.com, anup.patel@wdc.com, atish.patra@wdc.com, lukma@denx.de, pragnesh.patel@sifive.com, jagan@amarulasolutions.com, bmeng.cn@gmail.com, sjg@chromium.org, twoerner@gmail.com, patrick@blueri.se, festevam@gmail.com, weijie.gao@mediatek.com, Eugeniy.Paltsev@synopsys.com, Sagar Shrikant Kadam Subject: [PATCH 5/5] configs: reset: fu540: enable dm reset framework for SiFive SoC Date: Mon, 22 Jun 2020 05:27:56 -0700 Message-Id: <1592828876-7724-6-git-send-email-sagar.kadam@sifive.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1592828876-7724-1-git-send-email-sagar.kadam@sifive.com> References: <1592828876-7724-1-git-send-email-sagar.kadam@sifive.com> X-ClientProxiedBy: BYAPR21CA0011.namprd21.prod.outlook.com (2603:10b6:a03:114::21) To BN8PR13MB2611.namprd13.prod.outlook.com (2603:10b6:408:81::17) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from gamma07.internal.sifive.com (64.62.193.194) by BYAPR21CA0011.namprd21.prod.outlook.com (2603:10b6:a03:114::21) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256) id 15.20.3153.2 via Frontend Transport; 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Signed-off-by: Sagar Shrikant Kadam Reviewed-by: Pragnesh Patel Reviewed-by: Bin Meng Tested-by: Bin Meng --- configs/sifive_fu540_defconfig | 2 ++ drivers/reset/Kconfig | 9 +++++++++ drivers/reset/Makefile | 1 + 3 files changed, 12 insertions(+) diff --git a/configs/sifive_fu540_defconfig b/configs/sifive_fu540_defconfig index 8d412f8..6d78943 100644 --- a/configs/sifive_fu540_defconfig +++ b/configs/sifive_fu540_defconfig @@ -21,3 +21,5 @@ CONFIG_DEFAULT_DEVICE_TREE="hifive-unleashed-a00" CONFIG_SYS_RELOC_GD_ENV_ADDR=y CONFIG_SPL_CLK=y CONFIG_DM_MTD=y +CONFIG_SPL_DM_RESET=y +CONFIG_DM_RESET=y diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig index 88d3be1..627f8e8 100644 --- a/drivers/reset/Kconfig +++ b/drivers/reset/Kconfig @@ -148,4 +148,13 @@ config RESET_IMX7 help Support for reset controller on i.MX7/8 SoCs. +config RESET_SIFIVE + bool "Reset Driver for SiFive SoC's" + depends on DM_RESET && CLK_SIFIVE_FU540_PRCI && TARGET_SIFIVE_FU540 + default y + help + PRCI module within SiFive SoC's provides mechanism to reset + different hw blocks like DDR, gemgxl. With this driver we leverage + U-Boot's reset framework to reset these hardware blocks. + endmenu diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile index 0a044d5..e3c27c4 100644 --- a/drivers/reset/Makefile +++ b/drivers/reset/Makefile @@ -23,3 +23,4 @@ obj-$(CONFIG_RESET_MTMIPS) += reset-mtmips.o obj-$(CONFIG_RESET_SUNXI) += reset-sunxi.o obj-$(CONFIG_RESET_HISILICON) += reset-hisilicon.o obj-$(CONFIG_RESET_IMX7) += reset-imx7.o +obj-$(CONFIG_RESET_SIFIVE) += reset-sifive.o