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Thu, 4 Jun 2020 10:44:55 +0000 From: Sagar Shrikant Kadam To: u-boot@lists.denx.de, rick@andestech.com, lukma@denx.de Cc: bmeng.cn@gmail.com, jagan@amarulasolutions.com, pragnesh.patel@sifive.com, anup.patel@wdc.com, sjg@chromium.org, seanga2@gmail.com, Sagar Shrikant Kadam Subject: [PATCH v3 2/4] riscv: dts: hifive-unleashed-a00: add cpu aliases Date: Thu, 4 Jun 2020 03:44:37 -0700 Message-Id: <1591267479-8900-3-git-send-email-sagar.kadam@sifive.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1591267479-8900-1-git-send-email-sagar.kadam@sifive.com> References: <1591267479-8900-1-git-send-email-sagar.kadam@sifive.com> X-ClientProxiedBy: BYAPR06CA0042.namprd06.prod.outlook.com (2603:10b6:a03:14b::19) To BN8PR13MB2611.namprd13.prod.outlook.com (2603:10b6:408:81::17) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from gamma07.internal.sifive.com (64.62.193.194) by BYAPR06CA0042.namprd06.prod.outlook.com (2603:10b6:a03:14b::19) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256) id 15.20.3066.18 via Frontend Transport; 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Without aliases we see that the CPU device sequence numbers are set randomly and the cpu list/detail command will show it as follows: => cpu list 1: cpu@0 rv64imac 0: cpu@1 rv64imafdc 2: cpu@2 rv64imafdc 3: cpu@3 rv64imafdc 4: cpu@4 rv64imafdc Seems like CPU probing with dm-model also relies on aliases as observed in case spi. The fu540-c000-u-boot.dtsi has cpu0/1/2/3/4 nodes and so adding corresponding aliases we can ensure that cpu devices are assigned proper sequence as follows: => cpu list 0: cpu@0 rv64imac 1: cpu@1 rv64imafdc 2: cpu@2 rv64imafdc 3: cpu@3 rv64imafdc 4: cpu@4 rv64imafdc Signed-off-by: Sagar Shrikant Kadam Reviewed-by: Pragnesh Patel --- arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi b/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi index 9787332..9894260 100644 --- a/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi +++ b/arch/riscv/dts/hifive-unleashed-a00-u-boot.dtsi @@ -7,6 +7,11 @@ / { aliases { + cpu0 = &cpu0; + cpu1 = &cpu1; + cpu2 = &cpu2; + cpu3 = &cpu3; + cpu4 = &cpu4; spi0 = &qspi0; spi2 = &qspi2; };