From patchwork Fri Jan 10 08:30:34 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sam Shih X-Patchwork-Id: 1220987 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de (client-ip=85.214.62.61; helo=phobos.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=fail (p=none dis=none) header.from=mediatek.com Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=mediatek.com header.i=@mediatek.com header.a=rsa-sha256 header.s=dk header.b=WhBLmYlh; dkim-atps=neutral Received: from phobos.denx.de (phobos.denx.de [85.214.62.61]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 47vLNR6hY7z9sR1 for ; Fri, 10 Jan 2020 22:29:11 +1100 (AEDT) Received: from h2850616.stratoserver.net (localhost [IPv6:::1]) by phobos.denx.de (Postfix) with ESMTP id 71DD581822; Fri, 10 Jan 2020 12:27:03 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=fail (p=none dis=none) header.from=mediatek.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de Authentication-Results: phobos.denx.de; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=mediatek.com header.i=@mediatek.com header.b="WhBLmYlh"; dkim-atps=neutral Received: by phobos.denx.de (Postfix, from userid 109) id 2221D80617; Fri, 10 Jan 2020 09:31:27 +0100 (CET) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de X-Spam-Level: * X-Spam-Status: No, score=1.2 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,MIME_BASE64_TEXT,RDNS_NONE,SPF_HELO_NONE, UNPARSEABLE_RELAY,URIBL_BLOCKED autolearn=no autolearn_force=no version=3.4.2 Received: from mailgw01.mediatek.com (unknown [210.61.82.183]) by phobos.denx.de (Postfix) with ESMTP id E99C980E45 for ; Fri, 10 Jan 2020 09:31:23 +0100 (CET) Authentication-Results: phobos.denx.de; dmarc=pass (p=none dis=none) header.from=mediatek.com Authentication-Results: phobos.denx.de; spf=pass smtp.mailfrom=sam.shih@mediatek.com X-UUID: 301c3cd14b464d86a86a121ab6286ddb-20200110 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=kszpopfWTd7I+a0+oFkr1abqEWyYiW2zqfYIrqExtac=; b=WhBLmYlh4ZafS94UYHLU7SbDgN8XSzAVYqEIBmYtpedaslKzI2ok5/ySB8gtBlkZRRZ4OwezgAS8jNHpF35kliULZJO4a5XvJtRqmZYgpNEYVoxV6+9TYV4zOTw1lHiIYVAq24VGpOX2YzNkcvXz1NIhBoCH+Rl7HvWLne40hj8=; X-UUID: 301c3cd14b464d86a86a121ab6286ddb-20200110 Received: from mtkcas06.mediatek.inc [(172.21.101.30)] by mailgw01.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.10 Build 0809 with TLS) with ESMTP id 360614305; Fri, 10 Jan 2020 16:31:19 +0800 Received: from mtkcas08.mediatek.inc (172.21.101.126) by mtkmbs05n2.mediatek.inc (172.21.101.140) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Fri, 10 Jan 2020 16:30:43 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas08.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Fri, 10 Jan 2020 16:30:46 +0800 From: Sam Shih To: Tom Rini Subject: [RESEND v2 09/10] arm: dts: mediatek: move u-boot properties to -u-boot.dtsi file Date: Fri, 10 Jan 2020 16:30:34 +0800 Message-ID: <1578645035-3032-10-git-send-email-sam.shih@mediatek.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1578645035-3032-1-git-send-email-sam.shih@mediatek.com> References: <1578645035-3032-1-git-send-email-sam.shih@mediatek.com> MIME-Version: 1.0 X-MTK: N X-Mailman-Approved-At: Fri, 10 Jan 2020 12:26:34 +0100 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.26 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: u-boot@lists.denx.de, Ryder Lee , GSS_MTK_Uboot_upstream Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" X-Virus-Scanned: clamav-milter 0.101.4 at phobos.denx.de X-Virus-Status: Clean This patch move u-boot properties to -u-boot.dtsi file. Signed-off-by: Sam Shih Reviewed-by: Ryder Lee --- arch/arm/dts/mt7623-u-boot.dtsi | 29 +++++++++++++++++++ arch/arm/dts/mt7623.dtsi | 6 ---- arch/arm/dts/mt7623n-bananapi-bpi-r2.dts | 1 + arch/arm/dts/mt7629-rfb-u-boot.dtsi | 36 ++++++++++++++++++++++++ arch/arm/dts/mt7629-rfb.dts | 1 + arch/arm/dts/mt7629.dtsi | 9 ------ 6 files changed, 67 insertions(+), 15 deletions(-) create mode 100644 arch/arm/dts/mt7623-u-boot.dtsi diff --git a/arch/arm/dts/mt7623-u-boot.dtsi b/arch/arm/dts/mt7623-u-boot.dtsi new file mode 100644 index 0000000000..832c16dca8 --- /dev/null +++ b/arch/arm/dts/mt7623-u-boot.dtsi @@ -0,0 +1,29 @@ +// SPDX-License-Identifier: GPL-2.0 +/* + * Copyright (c) 2019 MediaTek Inc. + * Author: Sam Shih + */ + +&topckgen { + u-boot,dm-pre-reloc; +}; + +&topckgen { + u-boot,dm-pre-reloc; +}; + +&pericfg { + u-boot,dm-pre-reloc; +}; + +&timer0 { + u-boot,dm-pre-reloc; +}; + +&apmixedsys { + u-boot,dm-pre-reloc; +}; + +&uart2 { + u-boot,dm-pre-reloc; +}; diff --git a/arch/arm/dts/mt7623.dtsi b/arch/arm/dts/mt7623.dtsi index 1135b1e1ae..1f45dea575 100644 --- a/arch/arm/dts/mt7623.dtsi +++ b/arch/arm/dts/mt7623.dtsi @@ -101,21 +101,18 @@ compatible = "mediatek,mt7623-topckgen"; reg = <0x10000000 0x1000>; #clock-cells = <1>; - u-boot,dm-pre-reloc; }; infracfg: syscon@10001000 { compatible = "mediatek,mt7623-infracfg", "syscon"; reg = <0x10001000 0x1000>; #clock-cells = <1>; - u-boot,dm-pre-reloc; }; pericfg: syscon@10003000 { compatible = "mediatek,mt7623-pericfg", "syscon"; reg = <0x10003000 0x1000>; #clock-cells = <1>; - u-boot,dm-pre-reloc; }; pinctrl: pinctrl@10005000 { @@ -155,7 +152,6 @@ interrupts = ; clocks = <&system_clk>; clock-names = "system-clk"; - u-boot,dm-pre-reloc; }; sysirq: interrupt-controller@10200100 { @@ -170,7 +166,6 @@ compatible = "mediatek,mt7623-apmixedsys"; reg = <0x10209000 0x1000>; #clock-cells = <1>; - u-boot,dm-pre-reloc; }; gic: interrupt-controller@10211000 { @@ -215,7 +210,6 @@ <&pericfg CLK_PERI_UART2>; clock-names = "baud", "bus"; status = "disabled"; - u-boot,dm-pre-reloc; }; uart3: serial@11005000 { diff --git a/arch/arm/dts/mt7623n-bananapi-bpi-r2.dts b/arch/arm/dts/mt7623n-bananapi-bpi-r2.dts index b0c86219b6..bcedcf20f1 100644 --- a/arch/arm/dts/mt7623n-bananapi-bpi-r2.dts +++ b/arch/arm/dts/mt7623n-bananapi-bpi-r2.dts @@ -7,6 +7,7 @@ /dts-v1/; #include "mt7623.dtsi" +#include "mt7623-u-boot.dtsi" / { model = "Bananapi BPI-R2"; diff --git a/arch/arm/dts/mt7629-rfb-u-boot.dtsi b/arch/arm/dts/mt7629-rfb-u-boot.dtsi index 1ef5568518..164afd633b 100644 --- a/arch/arm/dts/mt7629-rfb-u-boot.dtsi +++ b/arch/arm/dts/mt7629-rfb-u-boot.dtsi @@ -22,3 +22,39 @@ #endif }; }; + +&infracfg { + u-boot,dm-pre-reloc; +}; + +&pericfg { + u-boot,dm-pre-reloc; +}; + +&timer0 { + u-boot,dm-pre-reloc; +}; + +&mcucfg { + u-boot,dm-pre-reloc; +}; + +&dramc { + u-boot,dm-pre-reloc; +}; + +&apmixedsys { + u-boot,dm-pre-reloc; +}; + +&topckgen { + u-boot,dm-pre-reloc; +}; + +&uart0 { + u-boot,dm-pre-reloc; +}; + +&snfi { + u-boot,dm-pre-reloc; +}; diff --git a/arch/arm/dts/mt7629-rfb.dts b/arch/arm/dts/mt7629-rfb.dts index 0981f9b3b1..687fe1c029 100644 --- a/arch/arm/dts/mt7629-rfb.dts +++ b/arch/arm/dts/mt7629-rfb.dts @@ -7,6 +7,7 @@ /dts-v1/; #include "mt7629.dtsi" +#include "mt7629-rfb-u-boot.dtsi" / { model = "MediaTek MT7629 RFB"; diff --git a/arch/arm/dts/mt7629.dtsi b/arch/arm/dts/mt7629.dtsi index b0c843bafd..a33a74a556 100644 --- a/arch/arm/dts/mt7629.dtsi +++ b/arch/arm/dts/mt7629.dtsi @@ -68,14 +68,12 @@ compatible = "mediatek,mt7629-infracfg", "syscon"; reg = <0x10000000 0x1000>; #clock-cells = <1>; - u-boot,dm-pre-reloc; }; pericfg: syscon@10002000 { compatible = "mediatek,mt7629-pericfg", "syscon"; reg = <0x10002000 0x1000>; #clock-cells = <1>; - u-boot,dm-pre-reloc; }; timer0: timer@10004000 { @@ -85,7 +83,6 @@ clocks = <&topckgen CLK_TOP_CLKXTAL_D4>, <&topckgen CLK_TOP_10M_SEL>; clock-names = "mux", "src"; - u-boot,dm-pre-reloc; }; scpsys: scpsys@10006000 { @@ -103,7 +100,6 @@ compatible = "mediatek,mt7629-mcucfg", "syscon"; reg = <0x10200000 0x1000>; #clock-cells = <1>; - u-boot,dm-pre-reloc; }; sysirq: interrupt-controller@10200a80 { @@ -124,21 +120,18 @@ <&topckgen CLK_TOP_MEM_SEL>, <&topckgen CLK_TOP_DMPLL>; clock-names = "phy", "phy_mux", "mem", "mem_mux"; - u-boot,dm-pre-reloc; }; apmixedsys: clock-controller@10209000 { compatible = "mediatek,mt7629-apmixedsys"; reg = <0x10209000 0x1000>; #clock-cells = <1>; - u-boot,dm-pre-reloc; }; topckgen: clock-controller@10210000 { compatible = "mediatek,mt7629-topckgen"; reg = <0x10210000 0x1000>; #clock-cells = <1>; - u-boot,dm-pre-reloc; }; watchdog: watchdog@10212000 { @@ -186,7 +179,6 @@ status = "disabled"; assigned-clocks = <&topckgen CLK_TOP_AXI_SEL>; assigned-clock-parents = <&topckgen CLK_TOP_SYSPLL1_D2>; - u-boot,dm-pre-reloc; }; uart1: serial@11003000 { @@ -228,7 +220,6 @@ status = "disabled"; #address-cells = <1>; #size-cells = <0>; - u-boot,dm-pre-reloc; }; ethsys: syscon@1b000000 {