From patchwork Wed Jul 10 15:58:30 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Robert Hancock X-Patchwork-Id: 1130489 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dmarc=none (p=none dis=none) header.from=sedsystems.ca Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 45kP550x1Wz9s3l for ; Thu, 11 Jul 2019 01:59:18 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id CAC93C21EA8; Wed, 10 Jul 2019 15:59:13 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=none autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 1A543C21D8E; Wed, 10 Jul 2019 15:59:11 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 4F639C21D8E; Wed, 10 Jul 2019 15:59:09 +0000 (UTC) Received: from sed198n136.sedsystems.ca (sed198n136.SEDSystems.ca [198.169.180.136]) by lists.denx.de (Postfix) with ESMTPS id 9B2DBC21D65 for ; Wed, 10 Jul 2019 15:59:08 +0000 (UTC) Received: from barney.sedsystems.ca (barney [198.169.180.121]) by sed198n136.sedsystems.ca with ESMTP id x6AFx1Df024268 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 10 Jul 2019 09:59:01 -0600 (CST) Received: from SED.RFC1918.192.168.sedsystems.ca (eng1n65.eng.sedsystems.ca [172.21.1.65]) by barney.sedsystems.ca (8.14.7/8.14.4) with ESMTP id x6AFx0Oe029806 (version=TLSv1/SSLv3 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NO); Wed, 10 Jul 2019 09:59:01 -0600 From: Robert Hancock To: u-boot@lists.denx.de Date: Wed, 10 Jul 2019 09:58:30 -0600 Message-Id: <1562774310-32105-1-git-send-email-hancock@sedsystems.ca> X-Mailer: git-send-email 1.8.3.1 X-Scanned-By: MIMEDefang 2.64 on 198.169.180.136 Cc: uboot-imx@nxp.com Subject: [U-Boot] [PATCH] ARM: imx: Support larger SPL size on IMX6DQ X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Previously the SPL size on all iMX6 platforms was restricted to 68KB because the OCRAM size on iMX6SL/DL parts is only 128KB. However, the other iMX6 variants have 256KB of OCRAM. Add an option CONFIG_MX6_OCRAM_256KB which allows using the full size on boards which don't need to support the SL/DL variants. This allows for an SPL size of 196KB, which makes it much easier to use configurations such as SPL with driver model and FDT control. Signed-off-by: Robert Hancock Tested-by: Adam Ford #imx6q_logic --- arch/arm/mach-imx/mx6/Kconfig | 10 ++++++++++ common/spl/Kconfig | 3 ++- include/configs/imx6_spl.h | 28 ++++++++++++++++++++++++++-- 3 files changed, 38 insertions(+), 3 deletions(-) diff --git a/arch/arm/mach-imx/mx6/Kconfig b/arch/arm/mach-imx/mx6/Kconfig index fe5991e..0613616 100644 --- a/arch/arm/mach-imx/mx6/Kconfig +++ b/arch/arm/mach-imx/mx6/Kconfig @@ -87,6 +87,16 @@ config MX6ULL select SYSCOUNTER_TIMER select SYS_L2CACHE_OFF +config MX6_OCRAM_256KB + bool "Support 256KB OCRAM" + depends on MX6D || MX6Q + default n + help + Allows using the full 256KB size of the OCRAM on the MX6Q/MX6D series + of chips, such as for SPL. The OCRAM of the Lite series of chips is + only 128KB, so using this option will prevent the resulting code from + working on those chips. + config MX6_DDRCAL bool "Include dynamic DDR calibration routines" depends on SPL diff --git a/common/spl/Kconfig b/common/spl/Kconfig index 142753f..d709781 100644 --- a/common/spl/Kconfig +++ b/common/spl/Kconfig @@ -28,7 +28,8 @@ config SPL_FRAMEWORK config SPL_SIZE_LIMIT int "Maximum size of SPL image" depends on SPL - default 69632 if ARCH_MX6 + default 69632 if ARCH_MX6 && !MX6_OCRAM_256KB + default 200704 if ARCH_MX6 && MX6_OCRAM_256KB default 0 help Specifies the maximum length of the U-Boot SPL image. diff --git a/include/configs/imx6_spl.h b/include/configs/imx6_spl.h index 212dee7..a223930 100644 --- a/include/configs/imx6_spl.h +++ b/include/configs/imx6_spl.h @@ -7,10 +7,32 @@ #define __IMX6_SPL_CONFIG_H #ifdef CONFIG_SPL + +#ifdef CONFIG_MX6_OCRAM_256KB /* - * see Figure 8-3 in IMX6DQ/IMX6SDL Reference manuals: + * see Figure 8.4.1 in IMX6DQ Reference manuals: + * - IMX6DQ OCRAM (IRAM) is from 0x00907000 to 0x0093FFFF + * - BOOT ROM stack is at 0x0093FFB8 + * - if icache/dcache is enabled (eFuse/strapping controlled) then the + * IMX BOOT ROM will setup MMU table at 0x00938000, therefore we need to + * fit between 0x00907000 and 0x00938000. + * - Additionally the BOOT ROM loads what they consider the firmware image + * which consists of a 4K header in front of us that contains the IVT, DCD + * and some padding thus 'our' max size is really 0x00908000 - 0x00938000 + * or 192KB + */ +#define CONFIG_SPL_MAX_SIZE 0x30000 +#define CONFIG_SPL_STACK 0x0093FFB8 +/* + * Pad SPL to 196KB (4KB header + 192KB max size). This allows to write the + * SPL/U-Boot combination generated with u-boot-with-spl.imx directly to a + * boot media (given that boot media specific offset is configured properly). + */ +#define CONFIG_SPL_PAD_TO 0x31000 +#else +/* + * see Figure 8-3 in IMX6SDL Reference manuals: * - IMX6SDL OCRAM (IRAM) is from 0x00907000 to 0x0091FFFF - * - IMX6DQ has 2x IRAM of IMX6SDL but we intend to support IMX6SDL as well * - BOOT ROM stack is at 0x0091FFB8 * - if icache/dcache is enabled (eFuse/strapping controlled) then the * IMX BOOT ROM will setup MMU table at 0x00918000, therefore we need to @@ -29,6 +51,8 @@ */ #define CONFIG_SPL_PAD_TO 0x11000 +#endif + /* MMC support */ #if defined(CONFIG_SPL_MMC_SUPPORT) #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1