diff mbox series

[U-Boot,v4,2/8] imx: mx7: Skip secure init in arch_cpu_init

Message ID 1557297516-18616-3-git-send-email-jun.nie@linaro.org
State Accepted
Commit bc7c9ed33c685a8285e4fcf2a9f24499f14026a9
Delegated to: Stefano Babic
Headers show
Series pico-imx7d: Add support for BL33 case | expand

Commit Message

Jun Nie May 8, 2019, 6:38 a.m. UTC 
Skip secure related initialization in arch_cpu_init if low level
init is skipped.  Because these should be done in early stage
firmware, such as ARM trusted firmware.

Signed-off-by: Jun Nie <jun.nie@linaro.org>
---
 arch/arm/mach-imx/mx7/soc.c | 43 ++++++++++++++++++++++++++++---------------
 1 file changed, 28 insertions(+), 15 deletions(-)

Comments

Fabio Estevam May 30, 2019, 11:55 p.m. UTC | #1 
On Wed, May 8, 2019 at 3:39 AM Jun Nie <jun.nie@linaro.org> wrote:

> +#ifndef CONFIG_SKIP_LOWLEVEL_INIT
> +/* enable all periherial can be accessed in nosec mode */

Typo "peripheral"


> +static void init_csu(void)
> +{
> +       int i = 0;

No need to initialize i here.
Stefano Babic June 10, 2019, 9:41 a.m. UTC | #2 
> Skip secure related initialization in arch_cpu_init if low level
> init is skipped.  Because these should be done in early stage
> firmware, such as ARM trusted firmware.
> Signed-off-by: Jun Nie <jun.nie@linaro.org>

Applied to u-boot-imx, master, thanks !

Best regards,
Stefano Babic
diff mbox series

Patch

diff --git a/arch/arm/mach-imx/mx7/soc.c b/arch/arm/mach-imx/mx7/soc.c
index 7cfdff0..ccfab82 100644
--- a/arch/arm/mach-imx/mx7/soc.c
+++ b/arch/arm/mach-imx/mx7/soc.c
@@ -164,15 +164,6 @@  u32 __weak get_board_rev(void)
 }
 #endif
 
-#ifndef CONFIG_SKIP_LOWLEVEL_INIT
-/* enable all periherial can be accessed in nosec mode */
-static void init_csu(void)
-{
-	int i = 0;
-	for (i = 0; i < CSU_NUM_REGS; i++)
-		writel(CSU_INIT_SEC_LEVEL0, CSU_IPS_BASE_ADDR + i * 4);
-}
-
 static void imx_enet_mdio_fixup(void)
 {
 	struct iomuxc_gpr_base_regs *gpr_regs =
@@ -191,6 +182,26 @@  static void imx_enet_mdio_fixup(void)
 	}
 }
 
+static void init_cpu_basic(void)
+{
+	imx_enet_mdio_fixup();
+
+#ifdef CONFIG_APBH_DMA
+	/* Start APBH DMA */
+	mxs_dma_init();
+#endif
+}
+
+#ifndef CONFIG_SKIP_LOWLEVEL_INIT
+/* enable all periherial can be accessed in nosec mode */
+static void init_csu(void)
+{
+	int i = 0;
+
+	for (i = 0; i < CSU_NUM_REGS; i++)
+		writel(CSU_INIT_SEC_LEVEL0, CSU_IPS_BASE_ADDR + i * 4);
+}
+
 static void imx_gpcv2_init(void)
 {
 	u32 val, i;
@@ -269,12 +280,7 @@  int arch_cpu_init(void)
 	/* Disable PDE bit of WMCR register */
 	imx_wdog_disable_powerdown();
 
-	imx_enet_mdio_fixup();
-
-#ifdef CONFIG_APBH_DMA
-	/* Start APBH DMA */
-	mxs_dma_init();
-#endif
+	init_cpu_basic();
 
 #if CONFIG_IS_ENABLED(IMX_RDC)
 	isolate_resource();
@@ -286,6 +292,13 @@  int arch_cpu_init(void)
 
 	return 0;
 }
+#else
+int arch_cpu_init(void)
+{
+	init_cpu_basic();
+
+	return 0;
+}
 #endif
 
 #ifdef CONFIG_ARCH_MISC_INIT