From patchwork Tue Feb 6 14:25:36 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 869821 X-Patchwork-Delegate: marek.vasut@gmail.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=gmail.com header.i=@gmail.com header.b="RwGLXFC0"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 3zbS6c3pk4z9s8J for ; Wed, 7 Feb 2018 01:50:00 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 32C08C21DD7; Tue, 6 Feb 2018 14:34:39 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=FREEMAIL_FROM, RCVD_IN_DNSWL_BLOCKED, RCVD_IN_MSPIKE_H2, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 02807C21E42; Tue, 6 Feb 2018 14:32:26 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id CA9C6C21E68; Tue, 6 Feb 2018 14:31:42 +0000 (UTC) Received: from mail-pf0-f193.google.com (mail-pf0-f193.google.com [209.85.192.193]) by lists.denx.de (Postfix) with ESMTPS id C8227C21DDF for ; Tue, 6 Feb 2018 14:31:38 +0000 (UTC) Received: by mail-pf0-f193.google.com with SMTP id z79so668866pff.13 for ; Tue, 06 Feb 2018 06:31:38 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=OVpAt4JWBzecb4AvJP+3qTrX3XLwcoDZ30qZSR94TcE=; b=RwGLXFC0mGzm7vgkDtC6dXUeccJQYfOEr/MWKmyJP+VgEAfZFH9/MFVvHO6wHlmLRC yv992scVtHoLM1CKqVPans3MzIivwpfloTlv9U4kAdB9fKljRcslTp/CCkj7/JUqAimh O9zIVeS1VFcXdXwMYnekHB0WuMYZUopTe2SFp3V5GxclObSagUQtHEK8cGd+CgUrSjN3 /1/iaAO8VfUoJEP1HSnEjtOZg0N/Oo6rN6NDsxgfDT6MiR1kSZElrtMyr4UQ7IqK1dvC loQ8kGKB9oryQR0WyiAxayKQJwE+EQjoPFqG/dvK38/u31yxH5waVVGW/CPFFINiKVhK vQIw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=OVpAt4JWBzecb4AvJP+3qTrX3XLwcoDZ30qZSR94TcE=; b=knpJYc1p1yNX1WkjLjl1Y23JcDi3+8LQJPW0S0PsqcWiEoz970BcEtK16P4RoHBMBO Hx0azlMVLE/2FRf2VM6HYI8r+sORiJKayqxhA7s/tW7yZsya072drVrfYAwGcqGkeD3v 4rPsXfWXBE6cAHSJ7n4HwJ0W+SjHRM8n749jude8orpvDllWFi4hvjImAIFBC8fqVN2K dTwaLnHBVhz+2o4FoUayyy+Do3HlxzsYqSStznM6L2DRupTddoCzjwvOyIQLqz6q2abR k+4R1LFg4sYS6JthcgXme7fpsQIjNItUMiduNiO+y7Zyb0v+eiu2A5daCKWzCEhn5Xqm OFyQ== X-Gm-Message-State: APf1xPCjLVp5Wt+dFn7XBep/ogme0ZH1bYy1BGqCxFB+Zbo8Xm3HMckk 3xaRtjOXSarVSl9FFS43breVi9/N X-Google-Smtp-Source: AH8x225dJTiUAK/MoCmhdARpyaTYfT4OfaYRm3Aleqv5/81hLyeuK1ZrXdGkDAc+tSn+QI6kMto1hQ== X-Received: by 10.101.72.129 with SMTP id n1mr2081145pgs.181.1517927496933; Tue, 06 Feb 2018 06:31:36 -0800 (PST) Received: from localhost.localdomain ([115.97.187.51]) by smtp.gmail.com with ESMTPSA id h2sm17457613pgp.65.2018.02.06.06.31.33 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 06 Feb 2018 06:31:36 -0800 (PST) From: Jagan Teki X-Google-Original-From: Jagan Teki To: u-boot@lists.denx.de Date: Tue, 6 Feb 2018 19:55:36 +0530 Message-Id: <1517927164-18197-7-git-send-email-jagan@amarulasolutions.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1517927164-18197-1-git-send-email-jagan@amarulasolutions.com> References: <1517927164-18197-1-git-send-email-jagan@amarulasolutions.com> Cc: Marek Vasut , Maxime Ripard Subject: [U-Boot] [PATCH v4 06/34] musb: sunxi: Add OTG device clkgate and reset for H3/H5 X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Enable OTG device clkgate and reset for H3/H5 Signed-off-by: Jagan Teki Suggested-by: Jun Nie --- Note: Since the driver is dm-driver, we even add SOC changes based on compatible or driver_data but here few of the reset and clock bits and register offset memebers are in SOC includes files. I even try to add driver code by adding config structure in .data but that eventually increasing size. All these code will anyway move to clock and reset framework once dm support added. arch/arm/include/asm/arch-sunxi/clock_sun6i.h | 1 + drivers/usb/musb-new/sunxi.c | 24 ++++++++++++++++++------ 2 files changed, 19 insertions(+), 6 deletions(-) diff --git a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h index d794e16..6569883 100644 --- a/arch/arm/include/asm/arch-sunxi/clock_sun6i.h +++ b/arch/arm/include/asm/arch-sunxi/clock_sun6i.h @@ -288,6 +288,7 @@ struct sunxi_ccm_reg { #define AHB_GATE_OFFSET_USB_EHCI1 27 #define AHB_GATE_OFFSET_USB_EHCI0 26 #endif +#define AHB_GATE_OFFSET_OTG_DEVICE 23 #ifdef CONFIG_MACH_SUN50I #define AHB_GATE_OFFSET_USB0 23 #elif !defined(CONFIG_MACH_SUN8I_R40) diff --git a/drivers/usb/musb-new/sunxi.c b/drivers/usb/musb-new/sunxi.c index 562d311..7d94936 100644 --- a/drivers/usb/musb-new/sunxi.c +++ b/drivers/usb/musb-new/sunxi.c @@ -80,6 +80,8 @@ struct sunxi_glue { struct musb_host_data mdata; struct sunxi_ccm_reg *ccm; struct device dev; + u32 rst_bit; + u32 clkgate_bit; }; #define to_sunxi_glue(d) container_of(d, struct sunxi_glue, dev) @@ -269,10 +271,13 @@ static int sunxi_musb_init(struct musb *musb) musb->isr = sunxi_musb_interrupt; - setbits_le32(&glue->ccm->ahb_gate0, 1 << AHB_GATE_OFFSET_USB0); + setbits_le32(&glue->ccm->ahb_gate0, + BIT(AHB_GATE_OFFSET_USB0) | glue->clkgate_bit); #ifdef CONFIG_SUNXI_GEN_SUN6I - setbits_le32(&glue->ccm->ahb_reset0_cfg, 1 << AHB_GATE_OFFSET_USB0); + setbits_le32(&glue->ccm->ahb_reset0_cfg, + BIT(AHB_GATE_OFFSET_USB0) | glue->rst_bit); #endif + sunxi_usb_phy_init(0); USBC_ConfigFIFO_Base(); @@ -367,10 +372,15 @@ static int musb_usb_probe(struct udevice *dev) pdata.power = 250; pdata.platform_ops = &sunxi_musb_ops; - if (!device_is_compatible(dev, "allwinner,sun8i-h3-musb")) + if (!device_is_compatible(dev, "allwinner,sun8i-h3-musb")) { pdata.config = &musb_config; - else + } else { pdata.config = &musb_config_h3; +#ifdef CONFIG_MACH_SUNXI_H3_H5 + glue->rst_bit = BIT(AHB_GATE_OFFSET_OTG_DEVICE); + glue->clkgate_bit = BIT(AHB_GATE_OFFSET_OTG_DEVICE); +#endif + } #ifdef CONFIG_USB_MUSB_HOST pdata.mode = MUSB_HOST; @@ -400,9 +410,11 @@ static int musb_usb_remove(struct udevice *dev) sunxi_usb_phy_exit(0); #ifdef CONFIG_SUNXI_GEN_SUN6I - clrbits_le32(&glue->ccm->ahb_reset0_cfg, 1 << AHB_GATE_OFFSET_USB0); + clrbits_le32(&glue->ccm->ahb_reset0_cfg, + BIT(AHB_GATE_OFFSET_USB0) | glue->rst_bit); #endif - clrbits_le32(&glue->ccm->ahb_gate0, 1 << AHB_GATE_OFFSET_USB0); + clrbits_le32(&glue->ccm->ahb_gate0, + BIT(AHB_GATE_OFFSET_USB0) | glue->clkgate_bit); free(host->host); host->host = NULL;