From patchwork Fri Jan 19 09:53:48 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ryan Harkin X-Patchwork-Id: 863440 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (1024-bit key; unprotected) header.d=linaro.org header.i=@linaro.org header.b="eZfRdSlJ"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 3zNGQV2lv6z9s7h for ; Fri, 19 Jan 2018 20:54:58 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id 154B3C21ECC; Fri, 19 Jan 2018 09:54:36 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=-0.0 required=5.0 tests=RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 6C65AC21F1F; Fri, 19 Jan 2018 09:54:08 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 4D85AC21E13; Fri, 19 Jan 2018 09:54:03 +0000 (UTC) Received: from mail-wm0-f68.google.com (mail-wm0-f68.google.com [74.125.82.68]) by lists.denx.de (Postfix) with ESMTPS id 40C1AC21C41 for ; Fri, 19 Jan 2018 09:54:00 +0000 (UTC) Received: by mail-wm0-f68.google.com with SMTP id f3so2302469wmc.1 for ; Fri, 19 Jan 2018 01:54:00 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=1MkKDIGu2vxhK6QvBhkpZkzs1UG5PuBGls8LPAmYTbg=; b=eZfRdSlJ82icDNuexnDMBbV5dyLYIXyhT3bnfqZvqwmV9z2W+EnRZvL6okzPkNee0x hRkeqk6VezB1S1meHrCljMMuUp4Pv/c9WT68XCLCcJM/xbYII3CimACgJnwYBYYATVDh u5hwhMAPy6bs8mThk2gUWE4sQjmiI0fEnMMZc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=1MkKDIGu2vxhK6QvBhkpZkzs1UG5PuBGls8LPAmYTbg=; b=HKAy0n6W82L0VLV1JdCxXXuMgNfkButqtn9eDx+ZArsBQZ0B7u5sQ7AGdq9NDMqrug 62SW3w0xv+QYK1D5PCAYjg4zcZ5wcFuF9n59o0UJZi6elAt5zsRF+F04G6l1nj2IKUzq pI7r1N2sJW7+XfGwKhLsROCgymlbpPNbhn8FvtQEfR8OeQlGm6v4+0CZb7RH8GT0av0m lMCok0lcbnjz4VjuHjuGlswC4/1IIu1nMXj/J88YytP7qt0hmppfPRl9N6L04rQQUApm sD3uDUT4uXGBFZQ3J2dg4h1M1s/yFS4F5b+ims1+xGlsnwdeMQcw2lLx6BAYdtG8u7Kf T8cg== X-Gm-Message-State: AKwxyteTu0/0jQTZkJ2UarAK5Pvu+W5a/BCYe27MYCxsq9MBVZHQQf1l 5+VR+AfyXKkDvZtclKYxRf0FOnKbNxA= X-Google-Smtp-Source: ACJfBotkv0RkkK7kmF3U1YkEnbTSvPyFPS9TPC1l9X3d06Z1ZaQW571Fgvl4irejt/6d7JownV0r3g== X-Received: by 10.28.47.73 with SMTP id v70mr4125269wmv.41.1516355639654; Fri, 19 Jan 2018 01:53:59 -0800 (PST) Received: from localhost.localdomain (82-69-54-187.dsl.in-addr.zen.co.uk. [82.69.54.187]) by smtp.gmail.com with ESMTPSA id a62sm493090wmh.3.2018.01.19.01.53.58 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 19 Jan 2018 01:53:58 -0800 (PST) From: Ryan Harkin To: u-boot@lists.denx.de, Simon Glass Date: Fri, 19 Jan 2018 09:53:48 +0000 Message-Id: <1516355628-21784-3-git-send-email-ryan.harkin@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1516355628-21784-1-git-send-email-ryan.harkin@linaro.org> References: <1516355628-21784-1-git-send-email-ryan.harkin@linaro.org> Cc: Breno Lima , Eric Nelson , Stefan Agner Subject: [U-Boot] [PATCH 2/2] warp7: add support for console on UART6 and mikroBus X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Add support to route the serial console on the NXP WaRP7 board to UART6 and the mikroBus. To use UART6 on the WaRP7 board, I add the following lines to configs/warp7_defconfig: +CONFIG_MXC_CONSOLE_NUM=6 +CONFIG_SERIAL_MXC_DTE_MODE=y Signed-off-by: Ryan Harkin Reviewed-by: Bryan O'Donoghue --- board/warp7/Kconfig | 9 +++++++++ board/warp7/warp7.c | 6 ++++++ include/configs/warp7.h | 8 +++++++- 3 files changed, 22 insertions(+), 1 deletion(-) diff --git a/board/warp7/Kconfig b/board/warp7/Kconfig index 61c33fb..5fb4824 100644 --- a/board/warp7/Kconfig +++ b/board/warp7/Kconfig @@ -6,4 +6,13 @@ config SYS_BOARD config SYS_CONFIG_NAME default "warp7" +config MXC_CONSOLE_NUM + int "UART used for the console" + default 1 + help + The UART used for the console, expressed as a 1-based integer. + This is also used to set the console variable passed to the kernel. + Currently, only UART1 and UART6 are supported. Specifying a value + other than 6 will result in using UART1. + endif diff --git a/board/warp7/warp7.c b/board/warp7/warp7.c index d422d63..d345b0e 100644 --- a/board/warp7/warp7.c +++ b/board/warp7/warp7.c @@ -67,6 +67,11 @@ static iomux_v3_cfg_t const uart1_pads[] = { MX7D_PAD_UART1_RX_DATA__UART1_DCE_RX | MUX_PAD_CTRL(UART_PAD_CTRL), }; +static iomux_v3_cfg_t const uart6_pads[] = { + MX7D_PAD_ECSPI1_MOSI__UART6_DTE_RX | MUX_PAD_CTRL(UART_PAD_CTRL), + MX7D_PAD_ECSPI1_SCLK__UART6_DTE_TX | MUX_PAD_CTRL(UART_PAD_CTRL), +}; + static iomux_v3_cfg_t const usdhc3_pads[] = { MX7D_PAD_SD3_CLK__SD3_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL), MX7D_PAD_SD3_CMD__SD3_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL), @@ -84,6 +89,7 @@ static iomux_v3_cfg_t const usdhc3_pads[] = { static void setup_iomux_uart(void) { imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads)); + imx_iomux_v3_setup_multiple_pads(uart6_pads, ARRAY_SIZE(uart6_pads)); }; static struct fsl_esdhc_cfg usdhc_cfg[1] = { diff --git a/include/configs/warp7.h b/include/configs/warp7.h index 11f1bc3..271667d 100644 --- a/include/configs/warp7.h +++ b/include/configs/warp7.h @@ -13,7 +13,13 @@ #define PHYS_SDRAM_SIZE SZ_512M +#if (CONFIG_MXC_CONSOLE_NUM == 6) +#define CONFIG_MXC_UART_BASE UART6_IPS_BASE_ADDR +#define CONSOLE "ttymxc5" +#else #define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR +#define CONSOLE "ttymxc0" +#endif /* Size of malloc() pool */ #define CONFIG_SYS_MALLOC_LEN (35 * SZ_1M) @@ -31,7 +37,7 @@ CONFIG_DFU_ENV_SETTINGS \ "script=boot.scr\0" \ "image=zImage\0" \ - "console=ttymxc0\0" \ + "console=" CONSOLE "\0" \ "ethact=usb_ether\0" \ "fdt_high=0xffffffff\0" \ "initrd_high=0xffffffff\0" \