From patchwork Wed Nov 22 13:25:47 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Neil Armstrong X-Patchwork-Id: 840414 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=none (mailfrom) smtp.mailfrom=lists.denx.de (client-ip=81.169.180.215; helo=lists.denx.de; envelope-from=u-boot-bounces@lists.denx.de; receiver=) Authentication-Results: ozlabs.org; dkim=fail reason="signature verification failed" (2048-bit key; unprotected) header.d=baylibre-com.20150623.gappssmtp.com header.i=@baylibre-com.20150623.gappssmtp.com header.b="NSoWIyDZ"; dkim-atps=neutral Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 3yhjtJ1723z9s72 for ; Thu, 23 Nov 2017 00:27:20 +1100 (AEDT) Received: by lists.denx.de (Postfix, from userid 105) id C736EC21DB0; Wed, 22 Nov 2017 13:26:23 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=0.0 required=5.0 tests=RCVD_IN_MSPIKE_H2, T_DKIM_INVALID autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id A8929C21DB1; Wed, 22 Nov 2017 13:26:03 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id 23274C21C26; Wed, 22 Nov 2017 13:26:02 +0000 (UTC) Received: from mail-wr0-f196.google.com (mail-wr0-f196.google.com [209.85.128.196]) by lists.denx.de (Postfix) with ESMTPS id B4407C21D55 for ; Wed, 22 Nov 2017 13:26:01 +0000 (UTC) Received: by mail-wr0-f196.google.com with SMTP id k61so14531198wrc.4 for ; Wed, 22 Nov 2017 05:26:01 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=baylibre-com.20150623.gappssmtp.com; s=20150623; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=1R7TmlyLx/VefdUh2WzkoVds/kUi50WjB8mIf0X/7lc=; b=NSoWIyDZra1MfKn2Lq3CT45LMzQC3mLhg9Y2ev9l6yNHIra/sE4oRVHgWUP9bOGQoP E+34J6tmZXcmDL4HcrWEolYp8DPu1pFr6jmueWCwt9aLfsxfC3FY+VRFFhcYyV2wPpPj /whPCMq5zijHh88gKmltcUZV/8jTZuIb97GPOWD7lR2dnUfRKRpMiyhl2LGmz/gHpSzD kvzmd5Vv5ekMZubfC41SjdTveOEynJlC9dIQp4X9m2eOtDnD7MG+pA7g8lAB4qhe/kzL pUDYGYSi3IiZy5rolO8NFhqXu4CgIvdkjKIk7Mhd3bDhSL35rfghx8DffwvBoTuosr8S 4fKg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=1R7TmlyLx/VefdUh2WzkoVds/kUi50WjB8mIf0X/7lc=; b=K+kiZ7wyFH5LClegVmrR17MUejR1LwEMCWW185BbbA2jr2tN+bW8mGhoiEQIy3xZAt yHMWmwweeftG93APC7UfCoQ5dJQUfTHBynopmmKYNWbwHcKCDbslC/dKXzGF1wOpwi/s rHxwhkDNYbOyHGfUTptPMXRi9Vaq60tizLJFYdwFl+S7P/qg+/sc+URPMZy7wXiIQ+lH 2YKZ49k9p/LgrlVMmwsZgAEqlBAIUbO8t9o7ZwXnwYQVn8g5vK2B2+AoqQNDZO3LlwjZ eSr+hUm5oXF9L64Yr02U5UATFIykHqHXynor6ze23Edo6P6+mYBIsLooKzIKhpdsS9Bt Iq1g== X-Gm-Message-State: AJaThX5jxopxf4J2zFtLfchROYNGLA6gQKtLoIS7HGA7X/m3vrajJaYY +XAnzi9rojBwzz/wMrM7PnfDSEEoUoc= X-Google-Smtp-Source: AGs4zMb3vMi5ZRNcUOvEDqoc1lbeEyXiFsBw1R2gLU3ecdIHfDF5MjMKUi4CGfU72mzvn6zPIx6NeQ== X-Received: by 10.223.160.217 with SMTP id n25mr17282680wrn.27.1511357160980; Wed, 22 Nov 2017 05:26:00 -0800 (PST) Received: from localhost.localdomain ([90.63.244.31]) by smtp.gmail.com with ESMTPSA id r3sm4319747wmg.31.2017.11.22.05.26.00 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 22 Nov 2017 05:26:00 -0800 (PST) From: Neil Armstrong To: u-boot@lists.denx.de Date: Wed, 22 Nov 2017 14:25:47 +0100 Message-Id: <1511357151-3771-2-git-send-email-narmstrong@baylibre.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1511357151-3771-1-git-send-email-narmstrong@baylibre.com> References: <1511357151-3771-1-git-send-email-narmstrong@baylibre.com> Cc: trini@konsulko.com, linux-amlogic@lists.infradead.org Subject: [U-Boot] [PATCH v2 1/5] ARM: arch-meson: add ethernet common init function X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" Introduce a generic common Ethernet Hardware init function common to all Amlogic GX SoCs with support for the Internal PHY enable for GXL SoCs. Signed-off-by: Neil Armstrong --- arch/arm/include/asm/arch-meson/eth.h | 15 ++++++++++ arch/arm/mach-meson/Makefile | 2 +- arch/arm/mach-meson/eth.c | 53 +++++++++++++++++++++++++++++++++++ 3 files changed, 69 insertions(+), 1 deletion(-) create mode 100644 arch/arm/include/asm/arch-meson/eth.h create mode 100644 arch/arm/mach-meson/eth.c diff --git a/arch/arm/include/asm/arch-meson/eth.h b/arch/arm/include/asm/arch-meson/eth.h new file mode 100644 index 0000000..8ea8e10 --- /dev/null +++ b/arch/arm/include/asm/arch-meson/eth.h @@ -0,0 +1,15 @@ +/* + * Copyright (C) 2016 BayLibre, SAS + * Author: Neil Armstrong + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#ifndef __MESON_ETH_H__ +#define __MESON_ETH_H__ + +#include + +void meson_gx_eth_init(phy_interface_t mode, bool use_internal_phy); + +#endif /* __MESON_ETH_H__ */ diff --git a/arch/arm/mach-meson/Makefile b/arch/arm/mach-meson/Makefile index bf49b8b..b4e8dde 100644 --- a/arch/arm/mach-meson/Makefile +++ b/arch/arm/mach-meson/Makefile @@ -4,4 +4,4 @@ # SPDX-License-Identifier: GPL-2.0+ # -obj-y += board.o sm.o +obj-y += board.o sm.o eth.o diff --git a/arch/arm/mach-meson/eth.c b/arch/arm/mach-meson/eth.c new file mode 100644 index 0000000..46ecb5e --- /dev/null +++ b/arch/arm/mach-meson/eth.c @@ -0,0 +1,53 @@ +/* + * Copyright (C) 2016 BayLibre, SAS + * Author: Neil Armstrong + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#include +#include +#include +#include + +void meson_gx_eth_init(phy_interface_t mode, bool use_internal_phy) +{ + switch (mode) { + case PHY_INTERFACE_MODE_RGMII: + case PHY_INTERFACE_MODE_RGMII_ID: + case PHY_INTERFACE_MODE_RGMII_RXID: + case PHY_INTERFACE_MODE_RGMII_TXID: + /* Set RGMII mode */ + setbits_le32(GXBB_ETH_REG_0, GXBB_ETH_REG_0_PHY_INTF | + GXBB_ETH_REG_0_TX_PHASE(1) | + GXBB_ETH_REG_0_TX_RATIO(4) | + GXBB_ETH_REG_0_PHY_CLK_EN | + GXBB_ETH_REG_0_CLK_EN); + break; + + case PHY_INTERFACE_MODE_RMII: + /* Set RMII mode */ + out_le32(GXBB_ETH_REG_0, GXBB_ETH_REG_0_INVERT_RMII_CLK | + GXBB_ETH_REG_0_CLK_EN); + +#ifdef CONFIG_MESON_GXL + if (use_internal_phy) { + /* Use Internal PHY */ + out_le32(GXBB_ETH_REG_2, 0x10110181); + out_le32(GXBB_ETH_REG_3, 0xe40908ff); + } +#endif + + break; + + default: + printf("Invalid Ethernet interface mode\n"); + return; + } + + /* Enable power and clock gate */ + setbits_le32(GXBB_GCLK_MPEG_1, GXBB_GCLK_MPEG_1_ETH); + clrbits_le32(GXBB_MEM_PD_REG_0, GXBB_MEM_PD_REG_0_ETH_MASK); +}