Message ID | 1501686327-13599-2-git-send-email-sebastien.szymanski@armadeus.com |
---|---|
State | Accepted |
Commit | 0c7c6fb7641646c45630235ea906200981f4fe80 |
Delegated to: | Stefano Babic |
Headers | show |
On 02/08/2017 17:05, Sébastien Szymanski wrote: > i.MX6ULL has different speed grades than i.MX6UL. > > Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com> > --- > Notice that the i.MX6ULL RM says: > 2b'00: 800MHz; 2b'01: 850MHz; 2b'10: 1GHz; 2b'11: 1.2Ghz; > which seems incorrect. The commit [1] confirmed it, but I cannot find any > 996MHz i.MX6ULL on the NXP website. According to [2], there are only 3 i.MX6ULL > versions: 528, 792 and 900MHz. > > [1] http://git.freescale.com/git/cgit.cgi/imx/linux-imx.git/commit/arch/arm/mach-imx/mach-imx6ul.c?h=imx_4.1.15_2.0.0_ga&id=e8b9e8acb5ee44f48e048d744ccae4b6b02ef6a6 > [2] http://www.nxp.com/docs/en/data-sheet/IMX6ULLIEC.pdf > --- > arch/arm/mach-imx/mx6/soc.c | 19 ++++++++++++++++++- > 1 file changed, 18 insertions(+), 1 deletion(-) > > diff --git a/arch/arm/mach-imx/mx6/soc.c b/arch/arm/mach-imx/mx6/soc.c > index 7607456..c15b9cb 100644 > --- a/arch/arm/mach-imx/mx6/soc.c > +++ b/arch/arm/mach-imx/mx6/soc.c > @@ -114,6 +114,12 @@ u32 get_cpu_rev(void) > #define OCOTP_CFG3_SPEED_528MHZ 1 > #define OCOTP_CFG3_SPEED_696MHZ 2 > > +/* > + * For i.MX6ULL > + */ > +#define OCOTP_CFG3_SPEED_792MHZ 2 > +#define OCOTP_CFG3_SPEED_900MHZ 3 > + > u32 get_cpu_speed_grade_hz(void) > { > struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR; > @@ -126,7 +132,7 @@ u32 get_cpu_speed_grade_hz(void) > val >>= OCOTP_CFG3_SPEED_SHIFT; > val &= 0x3; > > - if (is_mx6ul() || is_mx6ull()) { > + if (is_mx6ul()) { > if (val == OCOTP_CFG3_SPEED_528MHZ) > return 528000000; > else if (val == OCOTP_CFG3_SPEED_696MHZ) > @@ -135,6 +141,17 @@ u32 get_cpu_speed_grade_hz(void) > return 0; > } > > + if (is_mx6ull()) { > + if (val == OCOTP_CFG3_SPEED_528MHZ) > + return 528000000; > + else if (val == OCOTP_CFG3_SPEED_792MHZ) > + return 792000000; > + else if (val == OCOTP_CFG3_SPEED_900MHZ) > + return 900000000; > + else > + return 0; > + } > + > switch (val) { > /* Valid for IMX6DQ */ > case OCOTP_CFG3_SPEED_1P2GHZ: > Applied to -master, thanks ! Best regards, Stefano Babic
diff --git a/arch/arm/mach-imx/mx6/soc.c b/arch/arm/mach-imx/mx6/soc.c index 7607456..c15b9cb 100644 --- a/arch/arm/mach-imx/mx6/soc.c +++ b/arch/arm/mach-imx/mx6/soc.c @@ -114,6 +114,12 @@ u32 get_cpu_rev(void) #define OCOTP_CFG3_SPEED_528MHZ 1 #define OCOTP_CFG3_SPEED_696MHZ 2 +/* + * For i.MX6ULL + */ +#define OCOTP_CFG3_SPEED_792MHZ 2 +#define OCOTP_CFG3_SPEED_900MHZ 3 + u32 get_cpu_speed_grade_hz(void) { struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR; @@ -126,7 +132,7 @@ u32 get_cpu_speed_grade_hz(void) val >>= OCOTP_CFG3_SPEED_SHIFT; val &= 0x3; - if (is_mx6ul() || is_mx6ull()) { + if (is_mx6ul()) { if (val == OCOTP_CFG3_SPEED_528MHZ) return 528000000; else if (val == OCOTP_CFG3_SPEED_696MHZ) @@ -135,6 +141,17 @@ u32 get_cpu_speed_grade_hz(void) return 0; } + if (is_mx6ull()) { + if (val == OCOTP_CFG3_SPEED_528MHZ) + return 528000000; + else if (val == OCOTP_CFG3_SPEED_792MHZ) + return 792000000; + else if (val == OCOTP_CFG3_SPEED_900MHZ) + return 900000000; + else + return 0; + } + switch (val) { /* Valid for IMX6DQ */ case OCOTP_CFG3_SPEED_1P2GHZ:
i.MX6ULL has different speed grades than i.MX6UL. Signed-off-by: Sébastien Szymanski <sebastien.szymanski@armadeus.com> --- Notice that the i.MX6ULL RM says: 2b'00: 800MHz; 2b'01: 850MHz; 2b'10: 1GHz; 2b'11: 1.2Ghz; which seems incorrect. The commit [1] confirmed it, but I cannot find any 996MHz i.MX6ULL on the NXP website. According to [2], there are only 3 i.MX6ULL versions: 528, 792 and 900MHz. [1] http://git.freescale.com/git/cgit.cgi/imx/linux-imx.git/commit/arch/arm/mach-imx/mach-imx6ul.c?h=imx_4.1.15_2.0.0_ga&id=e8b9e8acb5ee44f48e048d744ccae4b6b02ef6a6 [2] http://www.nxp.com/docs/en/data-sheet/IMX6ULLIEC.pdf --- arch/arm/mach-imx/mx6/soc.c | 19 ++++++++++++++++++- 1 file changed, 18 insertions(+), 1 deletion(-)