diff --git a/board/atmel/at91sam9260ek/partition.c b/board/atmel/at91sam9260ek/partition.c
index e41eefe..8617f48 100644
--- a/board/atmel/at91sam9260ek/partition.c
+++ b/board/atmel/at91sam9260ek/partition.c
@@ -13,7 +13,6 @@ AT91S_DATAFLASH_INFO dataflash_info[CONFIG_SYS_MAX_DATAFLASH_BANKS];
 
 struct dataflash_addr cs[CONFIG_SYS_MAX_DATAFLASH_BANKS] = {
 	{CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0, 0},	/* Logical adress, CS */
-	{CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1, 1}
 };
 
 /*define the area offsets*/
diff --git a/board/atmel/at91sam9261ek/partition.c b/board/atmel/at91sam9261ek/partition.c
index ed97609..8617f48 100644
--- a/board/atmel/at91sam9261ek/partition.c
+++ b/board/atmel/at91sam9261ek/partition.c
@@ -13,7 +13,6 @@ AT91S_DATAFLASH_INFO dataflash_info[CONFIG_SYS_MAX_DATAFLASH_BANKS];
 
 struct dataflash_addr cs[CONFIG_SYS_MAX_DATAFLASH_BANKS] = {
 	{CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0, 0},	/* Logical adress, CS */
-	{CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3, 3}
 };
 
 /*define the area offsets*/
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index c090562..ef48ee9 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -17,7 +17,6 @@ endif
 
 obj-$(CONFIG_ALTERA_SPI) += altera_spi.o
 obj-$(CONFIG_ATH79_SPI) += ath79_spi.o
-obj-$(CONFIG_ATMEL_DATAFLASH_SPI) += atmel_dataflash_spi.o
 obj-$(CONFIG_ATMEL_SPI) += atmel_spi.o
 obj-$(CONFIG_CADENCE_QSPI) += cadence_qspi.o cadence_qspi_apb.o
 obj-$(CONFIG_CF_SPI) += cf_spi.o
diff --git a/drivers/spi/atmel_dataflash_spi.c b/drivers/spi/atmel_dataflash_spi.c
deleted file mode 100644
index a2e9c00..0000000
--- a/drivers/spi/atmel_dataflash_spi.c
+++ /dev/null
@@ -1,184 +0,0 @@
-/*
- * Driver for ATMEL DataFlash support
- * Author : Hamid Ikdoumi (Atmel)
- *
- * SPDX-License-Identifier:	GPL-2.0+
- */
-
-/*
- * This driver desperately needs rework:
- *
- * - use structure SoC access
- * - get rid of including asm/arch/at91_spi.h
- * - remove asm/arch/at91_spi.h
- * - get rid of all CONFIG_ATMEL_LEGACY defines and uses
- *
- * 02-Aug-2010 Reinhard Meyer <uboot@emk-elektronik.de>
- */
-
-#include <common.h>
-#ifndef CONFIG_ATMEL_LEGACY
-# define CONFIG_ATMEL_LEGACY
-#endif
-#include <spi.h>
-#include <malloc.h>
-
-#include <asm/io.h>
-
-#include <asm/arch/clk.h>
-#include <asm/arch/hardware.h>
-
-#include "atmel_spi.h"
-
-#include <asm/arch/gpio.h>
-#include <asm/arch/at91_pio.h>
-#include <asm/arch/at91_spi.h>
-
-#include <dataflash.h>
-
-#define AT91_SPI_PCS0_DATAFLASH_CARD	0xE	/* Chip Select 0: NPCS0%1110 */
-#define AT91_SPI_PCS1_DATAFLASH_CARD	0xD	/* Chip Select 1: NPCS1%1101 */
-#define AT91_SPI_PCS2_DATAFLASH_CARD	0xB	/* Chip Select 2: NPCS2%1011 */
-#define AT91_SPI_PCS3_DATAFLASH_CARD	0x7	/* Chip Select 3: NPCS3%0111 */
-
-void AT91F_SpiInit(void)
-{
-	/* Reset the SPI */
-	writel(AT91_SPI_SWRST, ATMEL_BASE_SPI0 + AT91_SPI_CR);
-
-	/* Configure SPI in Master Mode with No CS selected !!! */
-	writel(AT91_SPI_MSTR | AT91_SPI_MODFDIS | AT91_SPI_PCS,
-	       ATMEL_BASE_SPI0 + AT91_SPI_MR);
-
-	/* Configure CS0 */
-	writel(AT91_SPI_NCPHA |
-	       (AT91_SPI_DLYBS & DATAFLASH_TCSS) |
-	       (AT91_SPI_DLYBCT & DATAFLASH_TCHS) |
-	       ((get_mck_clk_rate() / AT91_SPI_CLK) << 8),
-	       ATMEL_BASE_SPI0 + AT91_SPI_CSR(0));
-
-#ifdef CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1
-	/* Configure CS1 */
-	writel(AT91_SPI_NCPHA |
-	       (AT91_SPI_DLYBS & DATAFLASH_TCSS) |
-	       (AT91_SPI_DLYBCT & DATAFLASH_TCHS) |
-	       ((get_mck_clk_rate() / AT91_SPI_CLK) << 8),
-	       ATMEL_BASE_SPI0 + AT91_SPI_CSR(1));
-#endif
-#ifdef CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS2
-	/* Configure CS2 */
-	writel(AT91_SPI_NCPHA |
-	       (AT91_SPI_DLYBS & DATAFLASH_TCSS) |
-	       (AT91_SPI_DLYBCT & DATAFLASH_TCHS) |
-	       ((get_mck_clk_rate() / AT91_SPI_CLK) << 8),
-	       ATMEL_BASE_SPI0 + AT91_SPI_CSR(2));
-#endif
-#ifdef CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3
-	/* Configure CS3 */
-	writel(AT91_SPI_NCPHA |
-	       (AT91_SPI_DLYBS & DATAFLASH_TCSS) |
-	       (AT91_SPI_DLYBCT & DATAFLASH_TCHS) |
-	       ((get_mck_clk_rate() / AT91_SPI_CLK) << 8),
-	       ATMEL_BASE_SPI0 + AT91_SPI_CSR(3));
-#endif
-
-	/* SPI_Enable */
-	writel(AT91_SPI_SPIEN, ATMEL_BASE_SPI0 + AT91_SPI_CR);
-
-	while (!(readl(ATMEL_BASE_SPI0 + AT91_SPI_SR) & AT91_SPI_SPIENS))
-		;
-
-	/*
-	 * Add tempo to get SPI in a safe state.
-	 * Should not be needed for new silicon (Rev B)
-	 */
-	udelay(500000);
-	readl(ATMEL_BASE_SPI0 + AT91_SPI_SR);
-	readl(ATMEL_BASE_SPI0 + AT91_SPI_RDR);
-
-}
-
-void AT91F_SpiEnable(int cs)
-{
-	unsigned long mode;
-
-	mode = readl(ATMEL_BASE_SPI0 + AT91_SPI_MR);
-	mode &= ~AT91_SPI_PCS;
-
-	switch (cs) {
-	case 0:
-		mode |= AT91_SPI_PCS0_DATAFLASH_CARD << 16;
-		break;
-	case 1:
-		mode |= AT91_SPI_PCS1_DATAFLASH_CARD << 16;
-		break;
-	case 2:
-		mode |= AT91_SPI_PCS2_DATAFLASH_CARD << 16;
-		break;
-	case 3:
-		mode |= AT91_SPI_PCS3_DATAFLASH_CARD << 16;
-		break;
-	}
-
-	writel(mode, ATMEL_BASE_SPI0 + AT91_SPI_MR);
-
-	/* SPI_Enable */
-	writel(AT91_SPI_SPIEN, ATMEL_BASE_SPI0 + AT91_SPI_CR);
-}
-
-unsigned int AT91F_SpiWrite1(AT91PS_DataflashDesc pDesc);
-
-unsigned int AT91F_SpiWrite(AT91PS_DataflashDesc pDesc)
-{
-	unsigned int timeout;
-	unsigned int timebase;
-
-	pDesc->state = BUSY;
-
-	writel(AT91_SPI_TXTDIS + AT91_SPI_RXTDIS,
-		ATMEL_BASE_SPI0 + AT91_SPI_PTCR);
-
-	/* Initialize the Transmit and Receive Pointer */
-	writel((unsigned int)pDesc->rx_cmd_pt,
-		ATMEL_BASE_SPI0 + AT91_SPI_RPR);
-	writel((unsigned int)pDesc->tx_cmd_pt,
-		ATMEL_BASE_SPI0 + AT91_SPI_TPR);
-
-	/* Intialize the Transmit and Receive Counters */
-	writel(pDesc->rx_cmd_size, ATMEL_BASE_SPI0 + AT91_SPI_RCR);
-	writel(pDesc->tx_cmd_size, ATMEL_BASE_SPI0 + AT91_SPI_TCR);
-
-	if (pDesc->tx_data_size != 0) {
-		/* Initialize the Next Transmit and Next Receive Pointer */
-		writel((unsigned int)pDesc->rx_data_pt,
-			ATMEL_BASE_SPI0 + AT91_SPI_RNPR);
-		writel((unsigned int)pDesc->tx_data_pt,
-			ATMEL_BASE_SPI0 + AT91_SPI_TNPR);
-
-		/* Intialize the Next Transmit and Next Receive Counters */
-		writel(pDesc->rx_data_size,
-			ATMEL_BASE_SPI0 + AT91_SPI_RNCR);
-		writel(pDesc->tx_data_size,
-			ATMEL_BASE_SPI0 + AT91_SPI_TNCR);
-	}
-
-	/* arm simple, non interrupt dependent timer */
-	timebase = get_timer(0);
-	timeout = 0;
-
-	writel(AT91_SPI_TXTEN + AT91_SPI_RXTEN,
-		ATMEL_BASE_SPI0 + AT91_SPI_PTCR);
-	while (!(readl(ATMEL_BASE_SPI0 + AT91_SPI_SR) & AT91_SPI_RXBUFF) &&
-		((timeout = get_timer(timebase)) < CONFIG_SYS_SPI_WRITE_TOUT))
-		;
-	writel(AT91_SPI_TXTDIS + AT91_SPI_RXTDIS,
-		ATMEL_BASE_SPI0 + AT91_SPI_PTCR);
-	pDesc->state = IDLE;
-
-	if (timeout >= CONFIG_SYS_SPI_WRITE_TOUT) {
-		printf("Error Timeout\n\r");
-		return DATAFLASH_ERROR;
-	}
-
-	return DATAFLASH_OK;
-}
diff --git a/include/configs/at91sam9260ek.h b/include/configs/at91sam9260ek.h
index 48d7f6a..4bd025c 100644
--- a/include/configs/at91sam9260ek.h
+++ b/include/configs/at91sam9260ek.h
@@ -104,7 +104,6 @@
 #define CONFIG_HAS_DATAFLASH		1
 #define CONFIG_SYS_MAX_DATAFLASH_BANKS		2
 #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0	0xC0000000	/* CS0 */
-#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1	0xD0000000	/* CS1 */
 #define AT91_SPI_CLK			15000000
 #else
 /* Enable MMC. The MCCK is conflicted with DataFlash */
@@ -157,20 +156,6 @@
 				"mtdparts=atmel_nand:-(root) "		\
 				"rw rootfstype=jffs2"
 
-#elif CONFIG_SYS_USE_DATAFLASH_CS1
-
-/* bootstrap + u-boot + env + linux in dataflash on CS1 */
-#define CONFIG_ENV_IS_IN_DATAFLASH	1
-#define CONFIG_SYS_MONITOR_BASE	(CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 + 0x8400)
-#define CONFIG_ENV_OFFSET		0x4200
-#define CONFIG_ENV_ADDR		(CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1 + CONFIG_ENV_OFFSET)
-#define CONFIG_ENV_SIZE		0x4200
-#define CONFIG_BOOTCOMMAND	"cp.b 0xD0084000 0x22000000 0x210000; bootm"
-#define CONFIG_BOOTARGS		"console=ttyS0,115200 "			\
-				"root=/dev/mtdblock0 "			\
-				"mtdparts=atmel_nand:-(root) "		\
-				"rw rootfstype=jffs2"
-
 #elif defined(CONFIG_SYS_USE_NANDFLASH)
 
 /* bootstrap + u-boot + env + linux in nandflash */
diff --git a/include/configs/at91sam9261ek.h b/include/configs/at91sam9261ek.h
index 505f945..3715ba2 100644
--- a/include/configs/at91sam9261ek.h
+++ b/include/configs/at91sam9261ek.h
@@ -88,7 +88,6 @@
 #define CONFIG_HAS_DATAFLASH
 #define CONFIG_SYS_MAX_DATAFLASH_BANKS		2
 #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0	0xC0000000	/* CS0 */
-#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3	0xD0000000	/* CS3 */
 #define AT91_SPI_CLK				15000000
 #define DATAFLASH_TCSS				(0x1a << 16)
 #define DATAFLASH_TCHS				(0x1 << 24)
@@ -150,20 +149,6 @@
 				"mtdparts=atmel_nand:-(root) "		\
 				"rw rootfstype=jffs2"
 
-#elif CONFIG_SYS_USE_DATAFLASH_CS3
-
-/* bootstrap + u-boot + env + linux in dataflash on CS3 */
-#define CONFIG_ENV_IS_IN_DATAFLASH
-#define CONFIG_SYS_MONITOR_BASE	(CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 + 0x8400)
-#define CONFIG_ENV_OFFSET	0x4200
-#define CONFIG_ENV_ADDR		(CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3 + CONFIG_ENV_OFFSET)
-#define CONFIG_ENV_SIZE		0x4200
-#define CONFIG_BOOTCOMMAND	"cp.b 0xD0084000 0x22000000 0x210000; bootm"
-#define CONFIG_BOOTARGS		"console=ttyS0,115200 "			\
-				"root=/dev/mtdblock0 "			\
-				"mtdparts=atmel_nand:-(root) "		\
-				"rw rootfstype=jffs2"
-
 #else /* CONFIG_SYS_USE_NANDFLASH */
 
 /* bootstrap + u-boot + env + linux in nandflash */
diff --git a/include/configs/pm9261.h b/include/configs/pm9261.h
index b22a3b6..1b997b3 100644
--- a/include/configs/pm9261.h
+++ b/include/configs/pm9261.h
@@ -185,7 +185,6 @@
 #define CONFIG_HAS_DATAFLASH
 #define CONFIG_SYS_MAX_DATAFLASH_BANKS		1
 #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0	0xC0000000	/* CS0 */
-#define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3	0xD0000000	/* CS3 */
 #define AT91_SPI_CLK				15000000
 #define DATAFLASH_TCSS				(0x1a << 16)
 #define DATAFLASH_TCHS				(0x1 << 24)
diff --git a/scripts/config_whitelist.txt b/scripts/config_whitelist.txt
index fa9c3fc..e462496 100644
--- a/scripts/config_whitelist.txt
+++ b/scripts/config_whitelist.txt
@@ -192,7 +192,6 @@ CONFIG_ATA_ACPI
 CONFIG_ATI
 CONFIG_ATI_RADEON_FB
 CONFIG_ATM
-CONFIG_ATMEL_DATAFLASH_SPI
 CONFIG_ATMEL_LCD
 CONFIG_ATMEL_LCD_BGR555
 CONFIG_ATMEL_LCD_RGB565
@@ -3189,9 +3188,6 @@ CONFIG_SYS_DA850_PLL1_PLLM
 CONFIG_SYS_DA850_PLL1_POSTDIV
 CONFIG_SYS_DA850_SYSCFG_SUSPSRC
 CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0
-CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS1
-CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS2
-CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS3
 CONFIG_SYS_DAVINCI_EMAC_PHY_COUNT
 CONFIG_SYS_DAVINCI_I2C_SLAVE
 CONFIG_SYS_DAVINCI_I2C_SLAVE1
