From patchwork Fri May 12 11:48:27 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 761583 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from lists.denx.de (dione.denx.de [81.169.180.215]) by ozlabs.org (Postfix) with ESMTP id 3wPT1D2rKdz9s75 for ; Fri, 12 May 2017 21:54:56 +1000 (AEST) Received: by lists.denx.de (Postfix, from userid 105) id 10517C21F06; Fri, 12 May 2017 11:51:24 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on lists.denx.de X-Spam-Level: X-Spam-Status: No, score=-0.0 required=5.0 tests=RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL autolearn=unavailable autolearn_force=no version=3.4.0 Received: from lists.denx.de (localhost [IPv6:::1]) by lists.denx.de (Postfix) with ESMTP id 34C05C21E60; Fri, 12 May 2017 11:50:35 +0000 (UTC) Received: by lists.denx.de (Postfix, from userid 105) id EA68BC21DF0; Fri, 12 May 2017 11:49:33 +0000 (UTC) Received: from mail-pg0-f65.google.com (mail-pg0-f65.google.com [74.125.83.65]) by lists.denx.de (Postfix) with ESMTPS id B5F58C21EA5 for ; Fri, 12 May 2017 11:49:29 +0000 (UTC) Received: by mail-pg0-f65.google.com with SMTP id i63so7367727pgd.2 for ; Fri, 12 May 2017 04:49:29 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=bNSif8fmJIhCbtB8y6XGdr4mahhVVKKjTrmiwMfs/Ss=; b=W4UZoXyd+Ay2w9vxN6w4LUnwvuGvPmfUfkMqUsc7rwxvdCXlJg1mYgAH7NSCdsaBl2 OmTTZqSJi71V6/FhfuJcefylQRGbzrmvqKj8uqPA2YCcvcXnR/BRRD6V56qVVAZYTiVs Ds33EvkzY3i48c4mNNyjuqTA0gfdx8vDqDE48DjwoujRe3sBX9T0a6O/AuEE7gQGW5vQ mOPsUtsQEQq8RlpcgPfPoloCC+ghqEXaFT7gFhS9pToNRhZXo8RNoaNuL2ZHuJSKcWmR C2yEJxHDy1qw/O6ZAjxi5X1OPYcOBF5u0ObVMMP+lPuNzuBoGz/Kx/eBwPFoe8AhvSTh 4qqA== X-Gm-Message-State: AODbwcA+GRHswfAX+DOaH7QqlN+XHN52N57/berYCYOgtT/3kaw6gJcH XWWHdKZTNu4xUA== X-Received: by 10.99.136.65 with SMTP id l62mr3990321pgd.151.1494589768419; Fri, 12 May 2017 04:49:28 -0700 (PDT) Received: from localhost.localdomain ([117.247.27.218]) by smtp.gmail.com with ESMTPSA id d3sm7127839pgc.37.2017.05.12.04.49.25 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Fri, 12 May 2017 04:49:27 -0700 (PDT) From: Jagan Teki To: Stefano Babic Date: Fri, 12 May 2017 17:18:27 +0530 Message-Id: <1494589708-15276-9-git-send-email-jagan@openedev.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1494589708-15276-1-git-send-email-jagan@openedev.com> References: <1494589708-15276-1-git-send-email-jagan@openedev.com> Cc: u-boot@lists.denx.de, Matteo Lisi Subject: [U-Boot] [PATCH 8/9] engicam: Add fdt_addr env value based on cpu_type X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.18 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Jagan Teki Define FDT_ADDR based on the respective SOM, and later patches will make use of this fdt_addr in single config file. Signed-off-by: Jagan Teki --- include/configs/imx6qdl_icore.h | 5 ++++- include/configs/imx6qdl_icore_rqs.h | 5 ++++- include/configs/imx6ul_geam.h | 5 ++++- include/configs/imx6ul_isiot.h | 5 ++++- 4 files changed, 16 insertions(+), 4 deletions(-) diff --git a/include/configs/imx6qdl_icore.h b/include/configs/imx6qdl_icore.h index 7e4d0c1..4f7029d 100644 --- a/include/configs/imx6qdl_icore.h +++ b/include/configs/imx6qdl_icore.h @@ -41,7 +41,7 @@ "image=uImage\0" \ "fit_image=fit.itb\0" \ "fdt_high=0xffffffff\0" \ - "fdt_addr=0x18000000\0" \ + "fdt_addr=" FDT_ADDR "\0" \ "boot_fdt=try\0" \ "mmcpart=1\0" \ "nandroot=ubi0:rootfs rootfstype=ubifs\0" \ @@ -109,6 +109,9 @@ #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR #define CONFIG_SYS_HZ 1000 +#define DRAM_OFFSET(x) 0x1##x +#define FDT_ADDR __stringify(DRAM_OFFSET(8000000)) + /* Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR diff --git a/include/configs/imx6qdl_icore_rqs.h b/include/configs/imx6qdl_icore_rqs.h index 525901b..d1e482d 100644 --- a/include/configs/imx6qdl_icore_rqs.h +++ b/include/configs/imx6qdl_icore_rqs.h @@ -36,7 +36,7 @@ "image=uImage\0" \ "fit_image=fit.itb\0" \ "fdt_high=0xffffffff\0" \ - "fdt_addr=0x18000000\0" \ + "fdt_addr=" FDT_ADDR "\0" \ "boot_fdt=try\0" \ "mmcpart=1\0" \ "mmcautodetect=yes\0" \ @@ -91,6 +91,9 @@ #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR #define CONFIG_SYS_HZ 1000 +#define DRAM_OFFSET(x) 0x1##x +#define FDT_ADDR __stringify(DRAM_OFFSET(8000000)) + /* Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR diff --git a/include/configs/imx6ul_geam.h b/include/configs/imx6ul_geam.h index 9841686..0502e1b 100644 --- a/include/configs/imx6ul_geam.h +++ b/include/configs/imx6ul_geam.h @@ -40,7 +40,7 @@ "image=uImage\0" \ "fit_image=fit.itb\0" \ "fdt_high=0xffffffff\0" \ - "fdt_addr=0x87800000\0" \ + "fdt_addr=" FDT_ADDR "\0" \ "boot_fdt=try\0" \ "mmcpart=1\0" \ "nandroot=ubi0:rootfs rootfstype=ubifs\0" \ @@ -108,6 +108,9 @@ #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR #define CONFIG_SYS_HZ 1000 +#define DRAM_OFFSET(x) 0x87##x +#define FDT_ADDR __stringify(DRAM_OFFSET(800000)) + /* Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR diff --git a/include/configs/imx6ul_isiot.h b/include/configs/imx6ul_isiot.h index f7fbaf2..23aabed 100644 --- a/include/configs/imx6ul_isiot.h +++ b/include/configs/imx6ul_isiot.h @@ -41,7 +41,7 @@ "fit_image=fit.itb\0" \ "splashpos=m,m\0" \ "fdt_high=0xffffffff\0" \ - "fdt_addr=0x87800000\0" \ + "fdt_addr=" FDT_ADDR "\0" \ "boot_fdt=try\0" \ "mmcpart=1\0" \ "nandroot=ubi0:rootfs rootfstype=ubifs\0" \ @@ -108,6 +108,9 @@ #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR #define CONFIG_SYS_HZ 1000 +#define DRAM_OFFSET(x) 0x87##x +#define FDT_ADDR __stringify(DRAM_OFFSET(800000)) + /* Physical Memory Map */ #define CONFIG_NR_DRAM_BANKS 1 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR