@@ -70,6 +70,7 @@ static iomux_v3_cfg_t const uart1_pads[] = {
MX6_PAD_CSI0_DAT11__UART1_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
};
+#ifndef CONFIG_OF_CONTROL
static iomux_v3_cfg_t const enet_pads[] = {
MX6_PAD_ENET_MDIO__ENET_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL),
MX6_PAD_ENET_MDC__ENET_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL),
@@ -100,6 +101,7 @@ static void setup_iomux_enet(void)
gpio_set_value(IMX_GPIO_NR(1, 25), 1);
udelay(100);
}
+#endif
static iomux_v3_cfg_t const usdhc2_pads[] = {
MX6_PAD_SD2_CLK__SD2_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
@@ -222,6 +224,7 @@ static void setup_spi(void)
imx_iomux_v3_setup_multiple_pads(ecspi1_pads, ARRAY_SIZE(ecspi1_pads));
}
+#ifndef CONFIG_OF_CONTROL
iomux_v3_cfg_t const pcie_pads[] = {
MX6_PAD_EIM_D19__GPIO3_IO19 | MUX_PAD_CTRL(NO_PAD_CTRL), /* POWER */
MX6_PAD_GPIO_17__GPIO7_IO12 | MUX_PAD_CTRL(NO_PAD_CTRL), /* RESET */
@@ -231,6 +234,7 @@ static void setup_pcie(void)
{
imx_iomux_v3_setup_multiple_pads(pcie_pads, ARRAY_SIZE(pcie_pads));
}
+#endif
iomux_v3_cfg_t const di0_pads[] = {
MX6_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK, /* DISP0_CLK */
@@ -507,6 +511,7 @@ int overwrite_console(void)
return 1;
}
+#ifndef CONFIG_OF_CONTROL
int board_eth_init(bd_t *bis)
{
setup_iomux_enet();
@@ -514,6 +519,7 @@ int board_eth_init(bd_t *bis)
return cpu_eth_init(bis);
}
+#endif
#if defined(CONFIG_USB_EHCI_MX6) && !defined(CONFIG_DM_USB)
#define USB_OTHERREGS_OFFSET 0x800
@@ -52,6 +52,7 @@ CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
# CONFIG_VIDEO_SW_CURSOR is not set
CONFIG_OF_LIBFDT=y
CONFIG_OF_CONTROL=y
+CONFIG_DM_ETH=y
CONFIG_DM_I2C=y
CONFIG_DM_GPIO=y
CONFIG_DM_MMC=y
@@ -53,6 +53,7 @@ CONFIG_G_DNL_PRODUCT_NUM=0xa4a5
# CONFIG_VIDEO_SW_CURSOR is not set
CONFIG_OF_LIBFDT=y
CONFIG_OF_CONTROL=y
+CONFIG_DM_ETH=y
CONFIG_DM_I2C=y
CONFIG_DM_GPIO=y
CONFIG_DM_MMC=y