diff --git a/board/freescale/ls1043aqds/Makefile b/board/freescale/ls1043aqds/Makefile
index f727bfd..49d8d7d 100644
--- a/board/freescale/ls1043aqds/Makefile
+++ b/board/freescale/ls1043aqds/Makefile
@@ -5,5 +5,7 @@
 #
 
 obj-y += ddr.o
+ifndef CONFIG_SPL_BUILD
 obj-y += eth.o
+endif
 obj-y += ls1043aqds.o
diff --git a/board/freescale/ls1043ardb/Makefile b/board/freescale/ls1043ardb/Makefile
index 5fe1cc9..2a4452e 100644
--- a/board/freescale/ls1043ardb/Makefile
+++ b/board/freescale/ls1043ardb/Makefile
@@ -4,7 +4,9 @@
 # SPDX-License-Identifier:	GPL-2.0+
 #
 
-obj-y += cpld.o
 obj-y += ddr.o
 obj-y += ls1043ardb.o
+ifndef CONFIG_SPL_BUILD
 obj-$(CONFIG_SYS_DPAA_FMAN) += eth.o
+obj-y += cpld.o
+endif
diff --git a/board/freescale/ls1043ardb/ls1043ardb.c b/board/freescale/ls1043ardb/ls1043ardb.c
index 2333843..6de7f9a 100644
--- a/board/freescale/ls1043ardb/ls1043ardb.c
+++ b/board/freescale/ls1043ardb/ls1043ardb.c
@@ -29,6 +29,15 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
+int board_early_init_f(void)
+{
+	fsl_lsch2_early_init_f();
+
+	return 0;
+}
+
+#ifndef CONFIG_SPL_BUILD
+
 int checkboard(void)
 {
 	static const char *freq[2] = {"100.00MHZ", "156.25MHZ"};
@@ -67,13 +76,6 @@ int checkboard(void)
 	return 0;
 }
 
-int board_early_init_f(void)
-{
-	fsl_lsch2_early_init_f();
-
-	return 0;
-}
-
 int board_init(void)
 {
 	struct ccsr_scfg *scfg = (struct ccsr_scfg *)CONFIG_SYS_FSL_SCFG_ADDR;
@@ -215,3 +217,5 @@ u16 flash_read16(void *addr)
 
 	return (((val) >> 8) & 0x00ff) | (((val) << 8) & 0xff00);
 }
+
+#endif
diff --git a/configs/ls1043ardb_sdcard_defconfig b/configs/ls1043ardb_sdcard_defconfig
index e57c42b..6bebbd9 100644
--- a/configs/ls1043ardb_sdcard_defconfig
+++ b/configs/ls1043ardb_sdcard_defconfig
@@ -17,7 +17,6 @@ CONFIG_SPL=y
 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR=y
 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0xf0
 CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_I2C_SUPPORT=y
 CONFIG_SPL_MPC8XXX_INIT_DDR_SUPPORT=y
 CONFIG_HUSH_PARSER=y
 CONFIG_CMD_GPT=y
diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h
index 5a5f951..19a808a 100644
--- a/include/configs/ls1043a_common.h
+++ b/include/configs/ls1043a_common.h
@@ -7,6 +7,21 @@
 #ifndef __LS1043A_COMMON_H
 #define __LS1043A_COMMON_H
 
+/* SPL build */
+#ifndef CONFIG_SPL_BUILD
+#define FMAN_UCODE
+#define DSPI
+#define PCIE
+#define CMD_ENV
+#define MISC
+#endif
+#if !(defined(CONFIG_SPL_BUILD) && defined(CONFIG_NAND_BOOT))
+#define MMC
+#endif
+#if !(defined(CONFIG_SPL_BUILD) && defined(CONFIG_SD_BOOT))
+#define IFC
+#endif
+
 #define CONFIG_REMAKE_ELF
 #define CONFIG_FSL_LAYERSCAPE
 #define CONFIG_LS1043A
@@ -82,6 +97,7 @@
 #endif
 
 /* IFC */
+#ifdef IFC
 #if !defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI)
 #define CONFIG_FSL_IFC
 /*
@@ -102,6 +118,7 @@
 #define CONFIG_FLASH_SHOW_PROGRESS	45	/* count down from 45/5: 9..1 */
 #endif
 #endif
+#endif
 
 /* I2C */
 #define CONFIG_SYS_I2C
@@ -112,6 +129,7 @@
 #define CONFIG_SYS_I2C_MXC_I2C4
 
 /* PCIe */
+#ifdef PCIE
 #define CONFIG_PCIE1		/* PCIE controller 1 */
 #define CONFIG_PCIE2		/* PCIE controller 2 */
 #define CONFIG_PCIE3		/* PCIE controller 3 */
@@ -121,17 +139,23 @@
 #define CONFIG_PCI_SCAN_SHOW
 #define CONFIG_CMD_PCI
 #endif
+#endif
 
 /* Command line configuration */
+#ifdef CMD_ENV
 #define CONFIG_CMD_ENV
+#endif
 
 /*  MMC  */
+#ifdef MMC
 #ifdef CONFIG_MMC
 #define CONFIG_FSL_ESDHC
 #define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
 #endif
+#endif
 
 /*  DSPI  */
+#ifdef DSPI
 #define CONFIG_FSL_DSPI
 #ifdef CONFIG_FSL_DSPI
 #define CONFIG_DM_SPI_FLASH
@@ -143,8 +167,10 @@
 #define CONFIG_SF_DEFAULT_CS		0
 #endif
 #endif
+#endif
 
 /* FMan ucode */
+#ifdef FMAN_UCODE
 #define CONFIG_SYS_DPAA_FMAN
 #ifdef CONFIG_SYS_DPAA_FMAN
 #define CONFIG_SYS_FM_MURAM_SIZE	0x60000
@@ -176,6 +202,7 @@
 #define CONFIG_SYS_QE_FMAN_FW_LENGTH	0x10000
 #define CONFIG_SYS_FDT_PAD		(0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
 #endif
+#endif
 
 /* Miscellaneous configurable options */
 #define CONFIG_SYS_LOAD_ADDR	(CONFIG_SYS_DDR_SDRAM_BASE + 0x10000000)
@@ -183,6 +210,7 @@
 #define CONFIG_HWCONFIG
 #define HWCONFIG_BUFFER_SIZE		128
 
+#ifdef MISC
 #if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
 #define MTDPARTS_DEFAULT "mtdparts=spi0.0:1m(uboot)," \
 			"5m(kernel),1m(dtb),9m(file_system)"
@@ -221,6 +249,7 @@
 #define CONFIG_BOOTCOMMAND		"cp.b $kernel_start $kernel_load "     \
 					"$kernel_size && bootm $kernel_load"
 #endif
+#endif
 
 /* Monitor Command Prompt */
 #define CONFIG_SYS_CBSIZE		512	/* Console I/O Buffer Size */
diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h
index f185380..e7d1f99 100644
--- a/include/configs/ls1043ardb.h
+++ b/include/configs/ls1043ardb.h
@@ -9,6 +9,19 @@
 
 #include "ls1043a_common.h"
 
+/* SPL build */
+#ifndef CONFIG_SPL_BUILD
+#define FMAN
+#define USB
+#define SATA
+#define QE
+#define EEPROM
+#define ENV
+#endif
+#if !(defined(CONFIG_SPL_BUILD) && defined(CONFIG_SD_BOOT))
+#define NAND_IFC
+#endif
+
 #if defined(CONFIG_NAND_BOOT) || defined(CONFIG_SD_BOOT)
 #define CONFIG_SYS_TEXT_BASE		0x82000000
 #else
@@ -90,7 +103,9 @@
 /*
  * NAND Flash Definitions
  */
+#ifdef NAND_IFC
 #define CONFIG_NAND_FSL_IFC
+#endif
 
 #define CONFIG_SYS_NAND_BASE		0x7e800000
 #define CONFIG_SYS_NAND_BASE_PHYS	CONFIG_SYS_NAND_BASE
@@ -213,6 +228,7 @@
 #define CONFIG_SYS_CS2_FTIM3		CONFIG_SYS_CPLD_FTIM3
 
 /* EEPROM */
+#ifdef EEPROM
 #define CONFIG_ID_EEPROM
 #define CONFIG_SYS_I2C_EEPROM_NXID
 #define CONFIG_SYS_EEPROM_BUS_NUM		0
@@ -220,11 +236,14 @@
 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN		1
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS	3
 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS	5
+#endif
 
 /*
  * Environment
  */
+#ifdef ENV
 #define CONFIG_ENV_OVERWRITE
+#endif
 
 #if defined(CONFIG_NAND_BOOT)
 #define CONFIG_ENV_IS_IN_NAND
@@ -243,6 +262,7 @@
 #endif
 
 /* FMan */
+#ifdef FMAN
 #ifdef CONFIG_SYS_DPAA_FMAN
 #define CONFIG_FMAN_ENET
 #define CONFIG_PHYLIB
@@ -266,23 +286,29 @@
 
 #define CONFIG_ETHPRIME			"FM1@DTSEC3"
 #endif
+#endif
 
 /* QE */
+#ifdef QE
 #if !defined(CONFIG_SD_BOOT) && !defined(CONFIG_NAND_BOOT) && \
 	!defined(CONFIG_QSPI_BOOT)
 #define CONFIG_U_QE
 #endif
 #define CONFIG_SYS_QE_FW_ADDR     0x60600000
+#endif
 
 /* USB */
+#ifdef USB
 #define CONFIG_HAS_FSL_XHCI_USB
 #ifdef CONFIG_HAS_FSL_XHCI_USB
 #define CONFIG_USB_XHCI_FSL
 #define CONFIG_USB_MAX_CONTROLLER_COUNT		3
 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS	2
 #endif
+#endif
 
 /* SATA */
+#ifdef SATA
 #define CONFIG_LIBATA
 #define CONFIG_SCSI_AHCI
 #define CONFIG_CMD_SCSI
@@ -299,6 +325,7 @@
 #define SCSI_VEND_ID 0x1b4b
 #define SCSI_DEV_ID  0x9170
 #define CONFIG_SCSI_DEV_LIST {SCSI_VEND_ID, SCSI_DEV_ID}
+#endif
 
 #include <asm/fsl_secure_boot.h>
 
