@@ -5,5 +5,7 @@
#
obj-y += ddr.o
+ifndef CONFIG_SPL_BUILD
obj-y += eth.o
+endif
obj-y += ls1046aqds.o
@@ -4,7 +4,9 @@
# SPDX-License-Identifier: GPL-2.0+
#
-obj-y += cpld.o
obj-y += ddr.o
obj-y += ls1046ardb.o
+ifndef CONFIG_SPL_BUILD
obj-$(CONFIG_SYS_DPAA_FMAN) += eth.o
+obj-y += cpld.o
+endif
@@ -24,6 +24,14 @@
DECLARE_GLOBAL_DATA_PTR;
+int board_early_init_f(void)
+{
+ fsl_lsch2_early_init_f();
+
+ return 0;
+}
+
+#ifndef CONFIG_SPL_BUILD
int checkboard(void)
{
static const char *freq[2] = {"100.00MHZ", "156.25MHZ"};
@@ -56,13 +64,6 @@ int checkboard(void)
return 0;
}
-int board_early_init_f(void)
-{
- fsl_lsch2_early_init_f();
-
- return 0;
-}
-
int board_init(void)
{
struct ccsr_scfg *scfg = (struct ccsr_scfg *)CONFIG_SYS_FSL_SCFG_ADDR;
@@ -161,3 +162,4 @@ int ft_board_setup(void *blob, bd_t *bd)
return 0;
}
+#endif
@@ -108,21 +108,27 @@
#define CONFIG_SYS_I2C_MXC_I2C3
#define CONFIG_SYS_I2C_MXC_I2C4
+#ifndef CONFIG_SPL_BUILD
/* Command line configuration */
#define CONFIG_CMD_ENV
+#endif
+#if !(defined(CONFIG_SPL_BUILD) && defined(CONFIG_NAND_BOOT))
/* MMC */
#ifdef CONFIG_MMC
#define CONFIG_FSL_ESDHC
#define CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33
#endif
+#endif
+#ifndef CONFIG_SPL_BUILD
#define CONFIG_SYS_DPAA_QBMAN /* Support Q/Bman */
/* FMan ucode */
#define CONFIG_SYS_DPAA_FMAN
#ifdef CONFIG_SYS_DPAA_FMAN
#define CONFIG_SYS_FM_MURAM_SIZE 0x60000
+#endif
#ifdef CONFIG_SD_BOOT
/*
@@ -156,6 +162,7 @@
#define CONFIG_HWCONFIG
#define HWCONFIG_BUFFER_SIZE 128
+#ifndef CONFIG_SPL_BUILD
/* Initial environment variables */
#define CONFIG_EXTRA_ENV_SETTINGS \
"hwconfig=fsl_ddr:bank_intlv=auto\0" \
@@ -173,13 +180,16 @@
#define CONFIG_BOOTARGS "console=ttyS0,115200 root=/dev/ram0 " \
"earlycon=uart8250,mmio,0x21c0500 " \
MTDPARTS_DEFAULT
+#endif
/* Monitor Command Prompt */
#define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
#define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
sizeof(CONFIG_SYS_PROMPT) + 16)
#define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot args buffer */
#define CONFIG_SYS_LONGHELP
+#ifndef CONFIG_SPL_BUILD
#define CONFIG_CMDLINE_EDITING 1
+#endif
#define CONFIG_AUTO_COMPLETE
#define CONFIG_SYS_MAXARGS 64 /* max command args */
@@ -51,13 +51,14 @@
#endif
#endif
+#if !(defined(CONFIG_SPL_BUILD) && defined(CONFIG_SD_BOOT))
/* IFC */
#define CONFIG_FSL_IFC
-
/*
* NAND Flash Definitions
*/
#define CONFIG_NAND_FSL_IFC
+#endif
#define CONFIG_SYS_NAND_BASE 0x7e800000
#define CONFIG_SYS_NAND_BASE_PHYS CONFIG_SYS_NAND_BASE
@@ -158,10 +159,12 @@
#define CONFIG_POWER_I2C
#endif
+#ifndef CONFIG_SPL_BUILD
/*
* Environment
*/
#define CONFIG_ENV_OVERWRITE
+#endif
#if defined(CONFIG_SD_BOOT)
#define CONFIG_ENV_IS_IN_MMC
@@ -175,6 +178,7 @@
#define CONFIG_ENV_SECT_SIZE 0x40000 /* 256KB */
#endif
+#ifndef CONFIG_SPL_BUILD
/* FMan */
#ifdef CONFIG_SYS_DPAA_FMAN
#define CONFIG_FMAN_ENET
@@ -238,5 +242,6 @@
"15m(u-boot),48m(kernel.itb);" \
"7e800000.flash:16m(nand_uboot)," \
"48m(nand_kernel),448m(nand_free)"
+#endif /* CONFIG_SPL_BUILD */
#endif /* __LS1046ARDB_H__ */