From patchwork Sun Jan 15 22:39:53 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lukasz Majewski X-Patchwork-Id: 715539 X-Patchwork-Delegate: trini@ti.com Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 3v1rtC6VYPz9t0P for ; Mon, 16 Jan 2017 09:40:34 +1100 (AEDT) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id EC254A75DC; Sun, 15 Jan 2017 23:40:29 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id Bmr0ryDWfbzF; Sun, 15 Jan 2017 23:40:29 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id B2DCCA75CC; Sun, 15 Jan 2017 23:40:28 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id C3A40A75CC for ; Sun, 15 Jan 2017 23:40:22 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id q4iQWSCt937E for ; Sun, 15 Jan 2017 23:40:22 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-out.m-online.net (mail-out.m-online.net [212.18.0.10]) by theia.denx.de (Postfix) with ESMTPS id 8C4A9A75B7 for ; Sun, 15 Jan 2017 23:40:18 +0100 (CET) Received: from frontend01.mail.m-online.net (unknown [192.168.8.182]) by mail-out.m-online.net (Postfix) with ESMTP id 3v1rst2grlz3hjl9; Sun, 15 Jan 2017 23:40:18 +0100 (CET) Received: from localhost (dynscan1.mnet-online.de [192.168.6.68]) by mail.m-online.net (Postfix) with ESMTP id 3v1rst0WvYzvkXc; Sun, 15 Jan 2017 23:40:18 +0100 (CET) X-Virus-Scanned: amavisd-new at mnet-online.de Received: from mail.mnet-online.de ([192.168.8.182]) by localhost (dynscan1.mail.m-online.net [192.168.6.68]) (amavisd-new, port 10024) with ESMTP id Mjk-XTZ8KP91; Sun, 15 Jan 2017 23:40:15 +0100 (CET) X-Auth-Info: qbY+yWjmjmFrJNaHPP8KNP+HC2sB2RykgXGIOm2bgUY= Received: from localhost.localdomain (87-206-159-178.dynamic.chello.pl [87.206.159.178]) (using TLSv1 with cipher AES256-SHA (256/256 bits)) (No client certificate requested) by mail.mnet-online.de (Postfix) with ESMTPSA; Sun, 15 Jan 2017 23:40:15 +0100 (CET) From: Lukasz Majewski To: Albert Aribaud , Nishanth Menon , Daniel Allred , Roger Quadros , Kipisz Steven , Ravi Babu , Lokesh Vutla Date: Sun, 15 Jan 2017 23:39:53 +0100 Message-Id: <1484519995-18534-1-git-send-email-lukma@denx.de> X-Mailer: git-send-email 2.1.4 Cc: u-boot@lists.denx.de Subject: [U-Boot] [PATCH 1/3] DRA7XX: HW_DATA: Provide dpll_params definitions for PCIe DPLL X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" With this code only 19.2 HMz SYSCLK (input) frequency is supported on dra7xx based SoCs. Signed-off-by: Lukasz Majewski --- arch/arm/cpu/armv7/omap5/hw_data.c | 12 ++++++++++++ arch/arm/include/asm/omap_common.h | 1 + 2 files changed, 13 insertions(+) diff --git a/arch/arm/cpu/armv7/omap5/hw_data.c b/arch/arm/cpu/armv7/omap5/hw_data.c index 2192090..e16bd2c 100644 --- a/arch/arm/cpu/armv7/omap5/hw_data.c +++ b/arch/arm/cpu/armv7/omap5/hw_data.c @@ -257,6 +257,17 @@ static const struct dpll_params gmac_dpll_params_2000mhz[NUM_SYS_CLKS] = { {625, 23, 4, 10, 40, 8, 10, -1, -1, -1, -1, -1}, /* 38.4 MHz */ }; +static const struct dpll_params pcie_dpll_params_1500mhz[NUM_SYS_CLKS] = { + {-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1}, /* 12 MHz */ + {-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1}, /* 20 MHz */ + {-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1}, /* 16.8 MHz */ + {625, 7, 15, -1, -1, -1, -1, -1, -1, -1, -1, -1}, /* 19.2 MHz */ + {-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1}, /* 26 MHz */ + {-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1}, /* 27 MHz */ + {-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1}, /* 38.4 MHz */ +}; + + struct dplls omap5_dplls_es1 = { .mpu = mpu_dpll_params_800mhz, .core = core_dpll_params_2128mhz_ddr532, @@ -294,6 +305,7 @@ struct dplls dra7xx_dplls = { .usb = usb_dpll_params_1920mhz, .ddr = ddr_dpll_params_2128mhz, .gmac = gmac_dpll_params_2000mhz, + .pcie = pcie_dpll_params_1500mhz, }; struct dplls dra72x_dplls = { diff --git a/arch/arm/include/asm/omap_common.h b/arch/arm/include/asm/omap_common.h index 605c549..cc40ee9 100644 --- a/arch/arm/include/asm/omap_common.h +++ b/arch/arm/include/asm/omap_common.h @@ -526,6 +526,7 @@ struct dplls { const struct dpll_params *usb; const struct dpll_params *ddr; const struct dpll_params *gmac; + const struct dpll_params *pcie; }; struct pmic_data {