From patchwork Tue Jan 10 23:10:20 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jagan Teki X-Patchwork-Id: 713481 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 3tynpN131Fz9sBR for ; Wed, 11 Jan 2017 10:11:40 +1100 (AEDT) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id AC4E4B391A; Wed, 11 Jan 2017 00:11:24 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 8nv9Ot4QnUT8; Wed, 11 Jan 2017 00:11:24 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id D1861B387C; Wed, 11 Jan 2017 00:11:15 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 6984CB38AD for ; Wed, 11 Jan 2017 00:11:09 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id l_lYWqD3iVi7 for ; Wed, 11 Jan 2017 00:11:09 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from mail-wj0-f193.google.com (mail-wj0-f193.google.com [209.85.210.193]) by theia.denx.de (Postfix) with ESMTPS id 07565B387A for ; Wed, 11 Jan 2017 00:11:04 +0100 (CET) Received: by mail-wj0-f193.google.com with SMTP id qs7so51399481wjc.1 for ; Tue, 10 Jan 2017 15:11:04 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=+VYQdQhEtY1Drxovy6cklXgkQiMO7O0zh2TrPrgNKF0=; b=L+Cwaia/h06Cp6/ha1dw5G65ik5dlEYZh6GbiLCXg3aSkQUlSY8YPwtslV8CPPO03d AxSzDkMwVukwG+cKRm53i32lSs8KsVth5F9IBsvZbULVcmESrgqKuylKFZ0sZ94TlEhf xlUPzudGWqa5DBqmGUAFVAzLUlP4et9bg/XJy0h8nj5/h6qZbKa3ez+dlWedL5Y9kt2j p6RCmPUG2PPquC4m0q4G08AM2lg15v6t8zGVq0Lu9GHsI7ZrTZLL0Andydv3Xq9NRS8g G8uYbAgH9e0eBwbICXYa3ZTvUerA986Whn6R7PgkRfxn8/0lExB7mxGcDHr3MpyZ5m+r sYKQ== X-Gm-Message-State: AIkVDXLi1wo5lQrI/cQtuP0kQIvNiJ0qg25OmXi4IZ+oXMje2BvmElTrAAYiBR0f6TC4BA== X-Received: by 10.194.97.173 with SMTP id eb13mr3080347wjb.76.1484089864134; Tue, 10 Jan 2017 15:11:04 -0800 (PST) Received: from jagan-XPS-13-9350.lavanda.local ([212.24.144.58]) by smtp.gmail.com with ESMTPSA id ei2sm5447373wjd.47.2017.01.10.15.11.02 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 10 Jan 2017 15:11:02 -0800 (PST) From: Jagan Teki To: Stefano Babic Date: Wed, 11 Jan 2017 00:10:20 +0100 Message-Id: <1484089820-6987-5-git-send-email-jagan@openedev.com> X-Mailer: git-send-email 1.9.1 In-Reply-To: <1484089820-6987-1-git-send-email-jagan@openedev.com> References: <1484089820-6987-1-git-send-email-jagan@openedev.com> Cc: u-boot@lists.denx.de, Matteo Lisi Subject: [U-Boot] [PATCH 4/4] imx6: icorem6_rqs: Add eMMC boot support X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" From: Jagan Teki Boot from eMMC: -------------- U-Boot SPL 2017.01-00005-g5986ea7-dirty (Jan 10 2017 - 23:56:16) Trying to boot from MMC2 U-Boot 2017.01-00005-g5986ea7-dirty (Jan 10 2017 - 23:56:16 +0100) CPU: Freescale i.MX6D rev1.2 at 792 MHz Reset cause: POR Model: Engicam i.CoreM6 Quad/Dual RQS Starter Kit DRAM: 512 MiB MMC: FSL_SDHC: 0, FSL_SDHC: 1 mmc_init: -70, time 38 *** Warning - MMC init failed, using default environment In: serial Out: serial Err: serial Net: No ethernet found. Hit any key to stop autoboot: 0 icorem6qdl-rqs> Cc: Stefano Babic Cc: Matteo Lisi Cc: Michael Trimarchi Signed-off-by: Jagan Teki --- board/engicam/icorem6_rqs/MAINTAINERS | 1 + board/engicam/icorem6_rqs/icorem6_rqs.c | 24 +++++++++++++++++++-- configs/imx6q_icore_rqs_emmc_defconfig | 38 +++++++++++++++++++++++++++++++++ include/configs/imx6qdl_icore_rqs.h | 2 +- 4 files changed, 62 insertions(+), 3 deletions(-) create mode 100644 configs/imx6q_icore_rqs_emmc_defconfig diff --git a/board/engicam/icorem6_rqs/MAINTAINERS b/board/engicam/icorem6_rqs/MAINTAINERS index 0556211..25ac83f 100644 --- a/board/engicam/icorem6_rqs/MAINTAINERS +++ b/board/engicam/icorem6_rqs/MAINTAINERS @@ -4,4 +4,5 @@ S: Maintained F: board/engicam/icorem6_rqs F: include/configs/imx6qdl_icore_rqs.h F: configs/imx6q_icore_rqs_mmc_defconfig +F: configs/imx6q_icore_rqs_emmc_defconfig F: configs/imx6dl_icore_rqs_mmc_defconfig diff --git a/board/engicam/icorem6_rqs/icorem6_rqs.c b/board/engicam/icorem6_rqs/icorem6_rqs.c index fc602a1..31a910c 100644 --- a/board/engicam/icorem6_rqs/icorem6_rqs.c +++ b/board/engicam/icorem6_rqs/icorem6_rqs.c @@ -77,8 +77,22 @@ static iomux_v3_cfg_t const usdhc3_pads[] = { IOMUX_PADS(PAD_SD3_DAT3__SD3_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), }; -struct fsl_esdhc_cfg usdhc_cfg[1] = { +static iomux_v3_cfg_t const usdhc4_pads[] = { + IOMUX_PADS(PAD_SD4_CLK__SD4_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD4_CMD__SD4_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD4_DAT0__SD4_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD4_DAT1__SD4_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD4_DAT2__SD4_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD4_DAT3__SD4_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD4_DAT4__SD4_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD4_DAT5__SD4_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD4_DAT6__SD4_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), + IOMUX_PADS(PAD_SD4_DAT7__SD4_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL)), +}; + +struct fsl_esdhc_cfg usdhc_cfg[2] = { {USDHC3_BASE_ADDR, 1, 4}, + {USDHC4_BASE_ADDR, 1, 8}, }; int board_mmc_getcd(struct mmc *mmc) @@ -88,6 +102,7 @@ int board_mmc_getcd(struct mmc *mmc) switch (cfg->esdhc_base) { case USDHC3_BASE_ADDR: + case USDHC4_BASE_ADDR: ret = 1; break; } @@ -102,7 +117,8 @@ int board_mmc_init(bd_t *bis) /* * According to the board_mmc_init() the following map is done: * (U-boot device node) (Physical Port) - * mmc0 USDHC3 + * mmc0 USDHC3 + * mmc1 USDHC4 */ for (i = 0; i < CONFIG_SYS_FSL_USDHC_NUM; i++) { switch (i) { @@ -110,6 +126,10 @@ int board_mmc_init(bd_t *bis) SETUP_IOMUX_PADS(usdhc3_pads); usdhc_cfg[i].sdhc_clk = mxc_get_clock(MXC_ESDHC3_CLK); break; + case 1: + SETUP_IOMUX_PADS(usdhc4_pads); + usdhc_cfg[i].sdhc_clk = mxc_get_clock(MXC_ESDHC4_CLK); + break; default: printf("Warning - USDHC%d controller not supporting\n", i + 1); diff --git a/configs/imx6q_icore_rqs_emmc_defconfig b/configs/imx6q_icore_rqs_emmc_defconfig new file mode 100644 index 0000000..fc54b5a --- /dev/null +++ b/configs/imx6q_icore_rqs_emmc_defconfig @@ -0,0 +1,38 @@ +CONFIG_ARM=y +CONFIG_ARCH_MX6=y +CONFIG_SPL_GPIO_SUPPORT=y +CONFIG_SPL_LIBCOMMON_SUPPORT=y +CONFIG_SPL_LIBGENERIC_SUPPORT=y +CONFIG_TARGET_MX6Q_ICORE_RQS=y +CONFIG_SPL_EXT_SUPPORT=y +CONFIG_SPL_LIBDISK_SUPPORT=y +CONFIG_SPL_SERIAL_SUPPORT=y +CONFIG_SPL_WATCHDOG_SUPPORT=y +CONFIG_DEFAULT_DEVICE_TREE="imx6q-icore-rqs" +CONFIG_SYS_EXTRA_OPTIONS="IMX_CONFIG=arch/arm/imx-common/spl_sd.cfg,ENV_IS_IN_MMC" +CONFIG_BOOTDELAY=3 +CONFIG_DEFAULT_FDT_FILE="imx6q-icore-rqs.dtb" +CONFIG_SPL=y +CONFIG_HUSH_PARSER=y +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_FIT_SIGNATURE=y +CONFIG_SYS_PROMPT="icorem6qdl-rqs> " +# CONFIG_CMD_IMLS is not set +CONFIG_CMD_MEMTEST=y +CONFIG_CMD_MMC=y +CONFIG_CMD_GPIO=y +CONFIG_CMD_MII=y +CONFIG_CMD_PING=y +CONFIG_CMD_CACHE=y +CONFIG_CMD_EXT2=y +CONFIG_CMD_EXT4=y +CONFIG_CMD_EXT4_WRITE=y +CONFIG_CMD_FAT=y +CONFIG_CMD_FS_GENERIC=y +# CONFIG_BLK is not set +# CONFIG_DM_MMC_OPS is not set +CONFIG_FEC_MXC=y +CONFIG_PINCTRL=y +CONFIG_PINCTRL_IMX6=y +CONFIG_MXC_UART=y diff --git a/include/configs/imx6qdl_icore_rqs.h b/include/configs/imx6qdl_icore_rqs.h index 6f7195d..cd94c5f 100644 --- a/include/configs/imx6qdl_icore_rqs.h +++ b/include/configs/imx6qdl_icore_rqs.h @@ -124,7 +124,7 @@ /* MMC */ #ifdef CONFIG_FSL_USDHC # define CONFIG_SYS_MMC_ENV_DEV 0 -# define CONFIG_SYS_FSL_USDHC_NUM 1 +# define CONFIG_SYS_FSL_USDHC_NUM 2 # define CONFIG_SYS_FSL_ESDHC_ADDR 0 #endif