@@ -107,6 +107,13 @@
status = "okay";
};
+&usdhc4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usdhc4>;
+ no-1-8-v;
+ status = "okay";
+};
+
&iomuxc {
pinctrl_enet: enetgrp {
fsl,pins = <
@@ -167,4 +174,19 @@
MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17070
>;
};
+
+ pinctrl_usdhc4: usdhc4grp {
+ fsl,pins = <
+ MX6QDL_PAD_SD4_CMD__SD4_CMD 0x17070
+ MX6QDL_PAD_SD4_CLK__SD4_CLK 0x10070
+ MX6QDL_PAD_SD4_DAT0__SD4_DATA0 0x17070
+ MX6QDL_PAD_SD4_DAT1__SD4_DATA1 0x17070
+ MX6QDL_PAD_SD4_DAT2__SD4_DATA2 0x17070
+ MX6QDL_PAD_SD4_DAT3__SD4_DATA3 0x17070
+ MX6QDL_PAD_SD4_DAT4__SD4_DATA4 0x17070
+ MX6QDL_PAD_SD4_DAT5__SD4_DATA5 0x17070
+ MX6QDL_PAD_SD4_DAT6__SD4_DATA6 0x17070
+ MX6QDL_PAD_SD4_DAT7__SD4_DATA7 0x17070
+ >;
+ };
};
Add usdhc4 node, which is eMMC for Engicam i.CoreM6 RQS modules. eMMC Log: -------- icorem6qdl-rqs> mmc dev 1 switch to partitions #0, OK mmc1(part 0) is current device icorem6qdl-rqs> mmcinfo Device: FSL_SDHC Manufacturer ID: fe OEM: 14e Name: MMC04 Tran Speed: 52000000 Rd Block Len: 512 MMC version 4.4.1 High Capacity: Yes Capacity: 3.5 GiB Bus Width: 4-bit Erase Group Size: 512 KiB HC WP Group Size: 4 MiB User Capacity: 3.5 GiB Boot Capacity: 16 MiB ENH RPMB Capacity: 128 KiB ENH Cc: Stefano Babic <sbabic@denx.de> Cc: Matteo Lisi <matteo.lisi@engicam.com> Cc: Michael Trimarchi <michael@amarulasolutions.com> Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> --- arch/arm/dts/imx6qdl-icore-rqs.dtsi | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+)