diff mbox

[U-Boot,3/3] udoo_neo: Add Ethernet support

Message ID 1481045906-2562-3-git-send-email-breno.lima@nxp.com
State Accepted
Commit a11e30f8c877ea9aaeef0e9e762b811a08d65bd1
Delegated to: Stefano Babic
Headers show

Commit Message

Breno Matheus Lima Dec. 6, 2016, 5:38 p.m. UTC 
UDOO Neo boards has one FEC port connected to KSZ8091, add support for it.

Tested on a UDOO Neo Full with "dhcp zImage" command.

Signed-off-by: Breno Lima <breno.lima@nxp.com>
---
 board/udoo/neo/neo.c       | 95 ++++++++++++++++++++++++++++++++++++++++++++++
 configs/udoo_neo_defconfig |  2 +-
 include/configs/udoo_neo.h | 17 ++++++++-
 3 files changed, 112 insertions(+), 2 deletions(-)

Comments

Stefano Babic Dec. 16, 2016, 9:23 a.m. UTC | #1 
On 06/12/2016 18:38, Breno Lima wrote:
> UDOO Neo boards has one FEC port connected to KSZ8091, add support for it.
> 
> Tested on a UDOO Neo Full with "dhcp zImage" command.
> 
> Signed-off-by: Breno Lima <breno.lima@nxp.com>
> ---
>  board/udoo/neo/neo.c       | 95 ++++++++++++++++++++++++++++++++++++++++++++++
>  configs/udoo_neo_defconfig |  2 +-
>  include/configs/udoo_neo.h | 17 ++++++++-
>  3 files changed, 112 insertions(+), 2 deletions(-)
> 
> diff --git a/board/udoo/neo/neo.c b/board/udoo/neo/neo.c
> index ad7452c..688b522 100644
> --- a/board/udoo/neo/neo.c
> +++ b/board/udoo/neo/neo.c
> @@ -10,6 +10,7 @@
>   */
>  
>  #include <asm/arch/clock.h>
> +#include <asm/arch/crm_regs.h>
>  #include <asm/arch/imx-regs.h>
>  #include <asm/arch/iomux.h>
>  #include <asm/arch/mx6-pins.h>
> @@ -25,8 +26,11 @@
>  #include <linux/sizes.h>
>  #include <common.h>
>  #include <i2c.h>
> +#include <miiphy.h>
> +#include <netdev.h>
>  #include <power/pmic.h>
>  #include <power/pfuze3000_pmic.h>
> +#include <malloc.h>
>  
>  DECLARE_GLOBAL_DATA_PTR;
>  
> @@ -50,6 +54,16 @@ enum {
>  	PAD_CTL_DSE_40ohm | PAD_CTL_HYS |		\
>  	PAD_CTL_ODE)
>  
> +#define ENET_PAD_CTRL  (PAD_CTL_PUS_100K_UP | PAD_CTL_PUE |     \
> +	PAD_CTL_SPEED_MED   |                                   \
> +	PAD_CTL_DSE_40ohm   | PAD_CTL_SRE_FAST)
> +
> +#define ENET_CLK_PAD_CTRL  (PAD_CTL_SPEED_MED | \
> +	PAD_CTL_DSE_120ohm   | PAD_CTL_SRE_FAST)
> +
> +#define ENET_RX_PAD_CTRL  (PAD_CTL_PKE | PAD_CTL_PUE |          \
> +	PAD_CTL_SPEED_MED   | PAD_CTL_SRE_FAST)
> +
>  #define WDOG_PAD_CTRL (PAD_CTL_PUE | PAD_CTL_PKE | PAD_CTL_SPEED_MED |	\
>  	PAD_CTL_DSE_40ohm)
>  
> @@ -213,6 +227,27 @@ static iomux_v3_cfg_t const usdhc2_pads[] = {
>  	MX6_PAD_SD1_CMD__GPIO6_IO_1 | MUX_PAD_CTRL(NO_PAD_CTRL),
>  };
>  
> +static iomux_v3_cfg_t const fec1_pads[] = {
> +	MX6_PAD_ENET1_MDC__ENET1_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL),
> +	MX6_PAD_ENET1_MDIO__ENET1_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL),
> +	MX6_PAD_RGMII1_RX_CTL__ENET1_RX_EN | MUX_PAD_CTRL(ENET_RX_PAD_CTRL),
> +	MX6_PAD_RGMII1_RD0__ENET1_RX_DATA_0 | MUX_PAD_CTRL(ENET_RX_PAD_CTRL),
> +	MX6_PAD_RGMII1_RD1__ENET1_RX_DATA_1 | MUX_PAD_CTRL(ENET_RX_PAD_CTRL),
> +	MX6_PAD_RGMII1_TX_CTL__ENET1_TX_EN | MUX_PAD_CTRL(ENET_PAD_CTRL),
> +	MX6_PAD_RGMII1_RXC__ENET1_RX_ER | MUX_PAD_CTRL(ENET_RX_PAD_CTRL),
> +	MX6_PAD_RGMII1_TD0__ENET1_TX_DATA_0 | MUX_PAD_CTRL(ENET_PAD_CTRL),
> +	MX6_PAD_RGMII1_TD1__ENET1_TX_DATA_1 | MUX_PAD_CTRL(ENET_PAD_CTRL),
> +	MX6_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 | MUX_PAD_CTRL(ENET_RX_PAD_CTRL),
> +	MX6_PAD_ENET2_TX_CLK__GPIO2_IO_9 | MUX_PAD_CTRL(ENET_RX_PAD_CTRL),
> +	MX6_PAD_ENET1_CRS__GPIO2_IO_1 | MUX_PAD_CTRL(ENET_PAD_CTRL),
> +};
> +
> +static iomux_v3_cfg_t const phy_control_pads[] = {
> +	/* 25MHz Ethernet PHY Clock */
> +	MX6_PAD_ENET2_RX_CLK__ENET2_REF_CLK_25M |
> +	MUX_PAD_CTRL(ENET_CLK_PAD_CTRL),
> +};
> +
>  static iomux_v3_cfg_t const board_recognition_pads[] = {
>  	/*Connected to R184*/
>  	MX6_PAD_NAND_READY_B__GPIO4_IO_13 | BOARD_DETECT_PAD_CFG,
> @@ -233,6 +268,66 @@ static void setup_iomux_uart(void)
>  	imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
>  }
>  
> +static int setup_fec(int fec_id)
> +{
> +	struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR;
> +	int reg;
> +
> +	imx_iomux_v3_setup_multiple_pads(phy_control_pads,
> +					 ARRAY_SIZE(phy_control_pads));
> +
> +	/* Reset PHY */
> +	gpio_direction_output(IMX_GPIO_NR(2, 1) , 0);
> +	udelay(10000);
> +	gpio_set_value(IMX_GPIO_NR(2, 1), 1);
> +	udelay(100);
> +
> +	reg = readl(&anatop->pll_enet);
> +	reg |= BM_ANADIG_PLL_ENET_REF_25M_ENABLE;
> +	writel(reg, &anatop->pll_enet);
> +
> +	return enable_fec_anatop_clock(fec_id, ENET_25MHZ);
> +}
> +
> +int board_eth_init(bd_t *bis)
> +{
> +	uint32_t base = IMX_FEC_BASE;
> +	struct mii_dev *bus = NULL;
> +	struct phy_device *phydev = NULL;
> +	int ret;
> +
> +	imx_iomux_v3_setup_multiple_pads(fec1_pads, ARRAY_SIZE(fec1_pads));
> +
> +	setup_fec(CONFIG_FEC_ENET_DEV);
> +
> +	bus = fec_get_miibus(base, CONFIG_FEC_ENET_DEV);
> +	if (!bus)
> +		return -EINVAL;
> +
> +	phydev = phy_find_by_mask(bus, (0x1 << CONFIG_FEC_MXC_PHYADDR),
> +					PHY_INTERFACE_MODE_RMII);
> +	if (!phydev) {
> +		free(bus);
> +		return -EINVAL;
> +	}
> +
> +	ret  = fec_probe(bis, CONFIG_FEC_ENET_DEV, base, bus, phydev);
> +	if (ret) {
> +		free(bus);
> +		free(phydev);
> +		return ret;
> +	}
> +	return 0;
> +}
> +
> +int board_phy_config(struct phy_device *phydev)
> +{
> +	if (phydev->drv->config)
> +		phydev->drv->config(phydev);
> +
> +	return 0;
> +}
> +
>  int board_init(void)
>  {
>  	/* Address of boot parameters */
> diff --git a/configs/udoo_neo_defconfig b/configs/udoo_neo_defconfig
> index f88820c..5df4ef9 100644
> --- a/configs/udoo_neo_defconfig
> +++ b/configs/udoo_neo_defconfig
> @@ -19,7 +19,7 @@ CONFIG_CMD_BOOTZ=y
>  CONFIG_CMD_MMC=y
>  CONFIG_CMD_GPIO=y
>  # CONFIG_CMD_SETEXPR is not set
> -# CONFIG_CMD_DHCP=y
> +CONFIG_CMD_DHCP=y
>  CONFIG_CMD_CACHE=y
>  CONFIG_CMD_TIME=y
>  CONFIG_CMD_EXT2=y
> diff --git a/include/configs/udoo_neo.h b/include/configs/udoo_neo.h
> index 0c59068..aec39db 100644
> --- a/include/configs/udoo_neo.h
> +++ b/include/configs/udoo_neo.h
> @@ -58,7 +58,8 @@
>  	BOOTENV
>  
>  #define BOOT_TARGET_DEVICES(func) \
> -	func(MMC, mmc, 0)
> +	func(MMC, mmc, 0) \
> +	func(DHCP, dhcp, na)
>  
>  #define CONFIG_BOOTCOMMAND \
>  	"run findfdt; " \
> @@ -103,4 +104,18 @@
>  #define CONFIG_POWER_PFUZE3000_I2C_ADDR	0x08
>  #define PFUZE3000_I2C_BUS	0
>  
> +/* Network */
> +#define CONFIG_FEC_MXC
> +#define CONFIG_MII
> +
> +#define CONFIG_FEC_ENET_DEV 0
> +#define IMX_FEC_BASE			ENET_BASE_ADDR
> +#define CONFIG_FEC_MXC_PHYADDR          0x0
> +
> +#define CONFIG_FEC_XCV_TYPE             RMII
> +#define CONFIG_ETHPRIME                 "FEC0"
> +
> +#define CONFIG_PHYLIB
> +#define CONFIG_PHY_MICREL
> +
>  #endif				/* __CONFIG_H */
> 
Applied to u-boot-imx, thanks !

Best regards,
Stefano Babic
diff mbox

Patch

diff --git a/board/udoo/neo/neo.c b/board/udoo/neo/neo.c
index ad7452c..688b522 100644
--- a/board/udoo/neo/neo.c
+++ b/board/udoo/neo/neo.c
@@ -10,6 +10,7 @@ 
  */
 
 #include <asm/arch/clock.h>
+#include <asm/arch/crm_regs.h>
 #include <asm/arch/imx-regs.h>
 #include <asm/arch/iomux.h>
 #include <asm/arch/mx6-pins.h>
@@ -25,8 +26,11 @@ 
 #include <linux/sizes.h>
 #include <common.h>
 #include <i2c.h>
+#include <miiphy.h>
+#include <netdev.h>
 #include <power/pmic.h>
 #include <power/pfuze3000_pmic.h>
+#include <malloc.h>
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -50,6 +54,16 @@  enum {
 	PAD_CTL_DSE_40ohm | PAD_CTL_HYS |		\
 	PAD_CTL_ODE)
 
+#define ENET_PAD_CTRL  (PAD_CTL_PUS_100K_UP | PAD_CTL_PUE |     \
+	PAD_CTL_SPEED_MED   |                                   \
+	PAD_CTL_DSE_40ohm   | PAD_CTL_SRE_FAST)
+
+#define ENET_CLK_PAD_CTRL  (PAD_CTL_SPEED_MED | \
+	PAD_CTL_DSE_120ohm   | PAD_CTL_SRE_FAST)
+
+#define ENET_RX_PAD_CTRL  (PAD_CTL_PKE | PAD_CTL_PUE |          \
+	PAD_CTL_SPEED_MED   | PAD_CTL_SRE_FAST)
+
 #define WDOG_PAD_CTRL (PAD_CTL_PUE | PAD_CTL_PKE | PAD_CTL_SPEED_MED |	\
 	PAD_CTL_DSE_40ohm)
 
@@ -213,6 +227,27 @@  static iomux_v3_cfg_t const usdhc2_pads[] = {
 	MX6_PAD_SD1_CMD__GPIO6_IO_1 | MUX_PAD_CTRL(NO_PAD_CTRL),
 };
 
+static iomux_v3_cfg_t const fec1_pads[] = {
+	MX6_PAD_ENET1_MDC__ENET1_MDC | MUX_PAD_CTRL(ENET_PAD_CTRL),
+	MX6_PAD_ENET1_MDIO__ENET1_MDIO | MUX_PAD_CTRL(ENET_PAD_CTRL),
+	MX6_PAD_RGMII1_RX_CTL__ENET1_RX_EN | MUX_PAD_CTRL(ENET_RX_PAD_CTRL),
+	MX6_PAD_RGMII1_RD0__ENET1_RX_DATA_0 | MUX_PAD_CTRL(ENET_RX_PAD_CTRL),
+	MX6_PAD_RGMII1_RD1__ENET1_RX_DATA_1 | MUX_PAD_CTRL(ENET_RX_PAD_CTRL),
+	MX6_PAD_RGMII1_TX_CTL__ENET1_TX_EN | MUX_PAD_CTRL(ENET_PAD_CTRL),
+	MX6_PAD_RGMII1_RXC__ENET1_RX_ER | MUX_PAD_CTRL(ENET_RX_PAD_CTRL),
+	MX6_PAD_RGMII1_TD0__ENET1_TX_DATA_0 | MUX_PAD_CTRL(ENET_PAD_CTRL),
+	MX6_PAD_RGMII1_TD1__ENET1_TX_DATA_1 | MUX_PAD_CTRL(ENET_PAD_CTRL),
+	MX6_PAD_ENET1_TX_CLK__ENET1_REF_CLK1 | MUX_PAD_CTRL(ENET_RX_PAD_CTRL),
+	MX6_PAD_ENET2_TX_CLK__GPIO2_IO_9 | MUX_PAD_CTRL(ENET_RX_PAD_CTRL),
+	MX6_PAD_ENET1_CRS__GPIO2_IO_1 | MUX_PAD_CTRL(ENET_PAD_CTRL),
+};
+
+static iomux_v3_cfg_t const phy_control_pads[] = {
+	/* 25MHz Ethernet PHY Clock */
+	MX6_PAD_ENET2_RX_CLK__ENET2_REF_CLK_25M |
+	MUX_PAD_CTRL(ENET_CLK_PAD_CTRL),
+};
+
 static iomux_v3_cfg_t const board_recognition_pads[] = {
 	/*Connected to R184*/
 	MX6_PAD_NAND_READY_B__GPIO4_IO_13 | BOARD_DETECT_PAD_CFG,
@@ -233,6 +268,66 @@  static void setup_iomux_uart(void)
 	imx_iomux_v3_setup_multiple_pads(uart1_pads, ARRAY_SIZE(uart1_pads));
 }
 
+static int setup_fec(int fec_id)
+{
+	struct anatop_regs *anatop = (struct anatop_regs *)ANATOP_BASE_ADDR;
+	int reg;
+
+	imx_iomux_v3_setup_multiple_pads(phy_control_pads,
+					 ARRAY_SIZE(phy_control_pads));
+
+	/* Reset PHY */
+	gpio_direction_output(IMX_GPIO_NR(2, 1) , 0);
+	udelay(10000);
+	gpio_set_value(IMX_GPIO_NR(2, 1), 1);
+	udelay(100);
+
+	reg = readl(&anatop->pll_enet);
+	reg |= BM_ANADIG_PLL_ENET_REF_25M_ENABLE;
+	writel(reg, &anatop->pll_enet);
+
+	return enable_fec_anatop_clock(fec_id, ENET_25MHZ);
+}
+
+int board_eth_init(bd_t *bis)
+{
+	uint32_t base = IMX_FEC_BASE;
+	struct mii_dev *bus = NULL;
+	struct phy_device *phydev = NULL;
+	int ret;
+
+	imx_iomux_v3_setup_multiple_pads(fec1_pads, ARRAY_SIZE(fec1_pads));
+
+	setup_fec(CONFIG_FEC_ENET_DEV);
+
+	bus = fec_get_miibus(base, CONFIG_FEC_ENET_DEV);
+	if (!bus)
+		return -EINVAL;
+
+	phydev = phy_find_by_mask(bus, (0x1 << CONFIG_FEC_MXC_PHYADDR),
+					PHY_INTERFACE_MODE_RMII);
+	if (!phydev) {
+		free(bus);
+		return -EINVAL;
+	}
+
+	ret  = fec_probe(bis, CONFIG_FEC_ENET_DEV, base, bus, phydev);
+	if (ret) {
+		free(bus);
+		free(phydev);
+		return ret;
+	}
+	return 0;
+}
+
+int board_phy_config(struct phy_device *phydev)
+{
+	if (phydev->drv->config)
+		phydev->drv->config(phydev);
+
+	return 0;
+}
+
 int board_init(void)
 {
 	/* Address of boot parameters */
diff --git a/configs/udoo_neo_defconfig b/configs/udoo_neo_defconfig
index f88820c..5df4ef9 100644
--- a/configs/udoo_neo_defconfig
+++ b/configs/udoo_neo_defconfig
@@ -19,7 +19,7 @@  CONFIG_CMD_BOOTZ=y
 CONFIG_CMD_MMC=y
 CONFIG_CMD_GPIO=y
 # CONFIG_CMD_SETEXPR is not set
-# CONFIG_CMD_DHCP=y
+CONFIG_CMD_DHCP=y
 CONFIG_CMD_CACHE=y
 CONFIG_CMD_TIME=y
 CONFIG_CMD_EXT2=y
diff --git a/include/configs/udoo_neo.h b/include/configs/udoo_neo.h
index 0c59068..aec39db 100644
--- a/include/configs/udoo_neo.h
+++ b/include/configs/udoo_neo.h
@@ -58,7 +58,8 @@ 
 	BOOTENV
 
 #define BOOT_TARGET_DEVICES(func) \
-	func(MMC, mmc, 0)
+	func(MMC, mmc, 0) \
+	func(DHCP, dhcp, na)
 
 #define CONFIG_BOOTCOMMAND \
 	"run findfdt; " \
@@ -103,4 +104,18 @@ 
 #define CONFIG_POWER_PFUZE3000_I2C_ADDR	0x08
 #define PFUZE3000_I2C_BUS	0
 
+/* Network */
+#define CONFIG_FEC_MXC
+#define CONFIG_MII
+
+#define CONFIG_FEC_ENET_DEV 0
+#define IMX_FEC_BASE			ENET_BASE_ADDR
+#define CONFIG_FEC_MXC_PHYADDR          0x0
+
+#define CONFIG_FEC_XCV_TYPE             RMII
+#define CONFIG_ETHPRIME                 "FEC0"
+
+#define CONFIG_PHYLIB
+#define CONFIG_PHY_MICREL
+
 #endif				/* __CONFIG_H */