| Message ID | 1480902750-839-8-git-send-email-andre.przywara@arm.com |
|---|---|
| State | Superseded |
| Delegated to: | Jagannadha Sutradharudu Teki |
| Headers | show |
Hi Andre, On 4 December 2016 at 18:52, Andre Przywara <andre.przywara@arm.com> wrote: > The sunxi DRAM setup code needs an sdelay() implementation, which > wasn't defined for armv8 so far. > Shamelessly copy the armv7 version and adjust it to work in AArch64. > > Signed-off-by: Andre Przywara <andre.przywara@arm.com> > --- > arch/arm/cpu/armv8/cpu.c | 13 +++++++++++++ > 1 file changed, 13 insertions(+) > > diff --git a/arch/arm/cpu/armv8/cpu.c b/arch/arm/cpu/armv8/cpu.c > index e06c3cc..0366ff4 100644 > --- a/arch/arm/cpu/armv8/cpu.c > +++ b/arch/arm/cpu/armv8/cpu.c > @@ -16,6 +16,19 @@ > #include <asm/system.h> > #include <linux/compiler.h> > > +/************************************************************ Can we drop the extra stars and use the normal function comment style? > + * sdelay() - simple spin loop. Will be constant time as > + * its generally used in bypass conditions only. This > + * is necessary until timers are accessible. > + * > + * not inline to increase chances its in cache when called Should mention the meaning of the parameter and that it cannot be called with 0. > + *************************************************************/ > +void sdelay(unsigned long loops) > +{ > + __asm__ volatile ("1:\n" "subs %0, %0, #1\n" > + "b.ne 1b" : "=r" (loops) : "0"(loops) : "cc"); > +} > + > int cleanup_before_linux(void) > { > /* > -- > 2.8.2 > Regards, Simon
diff --git a/arch/arm/cpu/armv8/cpu.c b/arch/arm/cpu/armv8/cpu.c index e06c3cc..0366ff4 100644 --- a/arch/arm/cpu/armv8/cpu.c +++ b/arch/arm/cpu/armv8/cpu.c @@ -16,6 +16,19 @@ #include <asm/system.h> #include <linux/compiler.h> +/************************************************************ + * sdelay() - simple spin loop. Will be constant time as + * its generally used in bypass conditions only. This + * is necessary until timers are accessible. + * + * not inline to increase chances its in cache when called + *************************************************************/ +void sdelay(unsigned long loops) +{ + __asm__ volatile ("1:\n" "subs %0, %0, #1\n" + "b.ne 1b" : "=r" (loops) : "0"(loops) : "cc"); +} + int cleanup_before_linux(void) { /*
The sunxi DRAM setup code needs an sdelay() implementation, which wasn't defined for armv8 so far. Shamelessly copy the armv7 version and adjust it to work in AArch64. Signed-off-by: Andre Przywara <andre.przywara@arm.com> --- arch/arm/cpu/armv8/cpu.c | 13 +++++++++++++ 1 file changed, 13 insertions(+)