From patchwork Mon Nov 28 06:18:14 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lukasz Majewski X-Patchwork-Id: 700002 X-Patchwork-Delegate: sbabic@denx.de Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Received: from theia.denx.de (theia.denx.de [85.214.87.163]) by ozlabs.org (Postfix) with ESMTP id 3tS84p0C1dz9vFN for ; Tue, 29 Nov 2016 01:21:46 +1100 (AEDT) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 0668AB38BB; Mon, 28 Nov 2016 15:21:41 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 5qMFaAwrV6NY; Mon, 28 Nov 2016 15:21:40 +0100 (CET) Received: from theia.denx.de (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id DB80BB3882; Mon, 28 Nov 2016 15:21:34 +0100 (CET) Received: from localhost (localhost [127.0.0.1]) by theia.denx.de (Postfix) with ESMTP id 3AFB7A75A9 for ; Mon, 28 Nov 2016 07:35:15 +0100 (CET) Received: from theia.denx.de ([127.0.0.1]) by localhost (theia.denx.de [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 21FZKYKo8UWg for ; Mon, 28 Nov 2016 07:35:15 +0100 (CET) X-policyd-weight: NOT_IN_SBL_XBL_SPAMHAUS=-1.5 NOT_IN_SPAMCOP=-1.5 NOT_IN_BL_NJABL=-1.5 (only DNSBL check requested) Received: from 1.mo2.mail-out.ovh.net (1.mo2.mail-out.ovh.net [46.105.63.121]) by theia.denx.de (Postfix) with ESMTPS id E550CA7579 for ; Mon, 28 Nov 2016 07:35:11 +0100 (CET) Received: from player731.ha.ovh.net (b9.ovh.net [213.186.33.59]) by mo2.mail-out.ovh.net (Postfix) with ESMTP id 2864C13713 for ; Mon, 28 Nov 2016 07:18:31 +0100 (CET) Received: from localhost.localdomain (unknown [109.241.15.61]) (Authenticated sender: l.majewski@majess.pl) by player731.ha.ovh.net (Postfix) with ESMTPSA id A7C2C420069; Mon, 28 Nov 2016 07:18:27 +0100 (CET) From: Lukasz Majewski To: Stefano Babic Date: Mon, 28 Nov 2016 07:18:14 +0100 Message-Id: <1480313894-8510-1-git-send-email-l.majewski@majess.pl> X-Mailer: git-send-email 2.1.4 X-Ovh-Tracer-Id: 14715230310652035658 X-VR-SPAMSTATE: OK X-VR-SPAMSCORE: -100 X-VR-SPAMCAUSE: gggruggvucftvghtrhhoucdtuddrfeelfedrfeehgdekiecutefuodetggdotefrodftvfcurfhrohhfihhlvgemucfqggfjpdevjffgvefmvefgnecuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmd X-Mailman-Approved-At: Mon, 28 Nov 2016 15:21:30 +0100 Cc: Albert Aribaud , Lukasz Majewski , u-boot@lists.denx.de Subject: [U-Boot] [PATCH] imx6: clock: Enable External Memory Interface [EIM] clock (eim_slow_clock) X-BeenThere: u-boot@lists.denx.de X-Mailman-Version: 2.1.15 Precedence: list List-Id: U-Boot discussion List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: u-boot-bounces@lists.denx.de Sender: "U-Boot" This patch extends the imx6 clock code to enable or disable the EIM slow clock, which in necessary when one wants to use EIM interface t o read/write from external memory (e.g. NOR). Signed-off-by: Lukasz Majewski --- arch/arm/cpu/armv7/mx6/clock.c | 14 ++++++++++++++ arch/arm/include/asm/arch-mx6/clock.h | 1 + 2 files changed, 15 insertions(+) diff --git a/arch/arm/cpu/armv7/mx6/clock.c b/arch/arm/cpu/armv7/mx6/clock.c index ae3143c..3227e3b 100644 --- a/arch/arm/cpu/armv7/mx6/clock.c +++ b/arch/arm/cpu/armv7/mx6/clock.c @@ -1379,6 +1379,20 @@ void select_ldb_di_clock_source(enum ldb_di_clock clk) } #endif +#ifndef CONFIG_SYS_NO_FLASH +void enable_eim_clk(unsigned char enable) +{ + u32 reg; + + reg = __raw_readl(&imx_ccm->CCGR6); + if (enable) + reg |= MXC_CCM_CCGR6_EMI_SLOW_MASK; + else + reg &= ~MXC_CCM_CCGR6_EMI_SLOW_MASK; + __raw_writel(reg, &imx_ccm->CCGR6); +} +#endif + /***************************************************/ U_BOOT_CMD( diff --git a/arch/arm/include/asm/arch-mx6/clock.h b/arch/arm/include/asm/arch-mx6/clock.h index 82f9f92..ed1433e 100644 --- a/arch/arm/include/asm/arch-mx6/clock.h +++ b/arch/arm/include/asm/arch-mx6/clock.h @@ -79,4 +79,5 @@ void enable_qspi_clk(int qspi_num); void enable_thermal_clk(void); void mxs_set_lcdclk(u32 base_addr, u32 freq); void select_ldb_di_clock_source(enum ldb_di_clock clk); +void enable_eim_clk(unsigned char enable); #endif /* __ASM_ARCH_CLOCK_H */